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CXA1390AQ Datasheet(PDF) 3 Page - Sony Corporation |
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CXA1390AQ Datasheet(HTML) 3 Page - Sony Corporation |
3 / 17 page – 3 – CXA1390AQ/AR 8 9 11 12 21 22 25 31 32 CS CCD SL CS CCD GC CSAGC GC CSAGC SL IRIS LEVEL IRIS GC DET LEVEL AGC CONT AGC MAX Level adjustment pin of high luminance detection pin of the input signal Gain adjustment pin of input signal high luminance part Gain adjustment pin of high luminance port after AGC Level adjustment pin of high luminance detection after AGC Adjustment pin of IRIS output weighting (Active at WND = L) Gain adjustment pin of IRIS output Adjustment pin of DET output weighting (Active at WND = L) AGC amplifier gain adjustment pin AGC amplifier MAX gain adjustment pin CLP1 pulse input pin Active at H (OPB clamp) Pre BLK pulse input pin Active at L Window pulse input pin Active at L CLP4 pulse input pin Active at H Regulator output pin (Used for the formation of AGC and IRIS loop) Operation amplifier non inverted input pin Operation amplifier inverted input pin (Test mode at 0V) H: 4V and above L: 1V and below 2.6 to 3.1V 1 to 3.3V 13 CLP1 14 P BLK 15 WND 36 CLP4 16 VG OUT 28 OP IN + 29 OP IN – 130 8 9 11 12 21 22 25 31 32 130 13 14 130 15 36 100µA 16 28 29 130 130 PIn No. Symbol Voltage Equivalent circuit Description |
Número de pieza similar - CXA1390AQ |
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Descripción similar - CXA1390AQ |
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