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CXA1700AR Datasheet(PDF) 9 Page - Sony Corporation |
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CXA1700AR Datasheet(HTML) 9 Page - Sony Corporation |
9 / 51 page —9— CXA1700AQ/AR Pin Symbol Pin voltage Equivalent circuit Description No. DC AC Input for VOW (character level) signal, VOB (character background) timing pulse of DDS (date display system) and masking timing pulse. MASK : VTH = 1.1V DDS : VTH = 2.0V By varying the input DC for DDS over a range of 2.3V to 3.0V, the character level can be changed. (Refer to item 4 on Description of Operation.) Determines the white/dark clipping levels. When open, the standard white clipping level is 235%, and the dark clipping level is 95%. (Mode DC1, 2 = Low, High) (Refer to item 5 on Description of Operation.) Video signal input. Performs diode clamping, with the clamp capacitance externally connected. If the mode MUTE is set High, the charge of the clamp capacitance is discharged. Time constant for the video AGC circuit in the I/O block. During mute and playback, the charge of the external capacitance is discharged. 150 45k 26 15k 2.0V 1.1V 16k 150 2.05V 10k 4.1V 30k 27 MUTE ON 270 28 100nA 4µA 100 1k 29 47k MUTE ON PB ON 26 DDS/MASK 27 WDC 28 V IN2 29 AGC TC1 2.0V (when open) (MASK) 1.5V (DDS) 2.3 to 3.0V 2.6V (when open) 2.05V (sync tip level) — — — Video 500mVp-p input — |
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