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NCV47711 Datasheet(PDF) 9 Page - ON Semiconductor

No. de Pieza. NCV47711
Descripción  5 V to 20 V Adjustable LDO with Adjustable Current Limit and 3.3 V Logic Compatible Enable Input
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Fabricante  ONSEMI [ON Semiconductor]
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NCV47711 Datasheet(HTML) 9 Page - ON Semiconductor

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Circuit Description
The NCV47711 is an integrated low dropout regulator
that provides a regulated voltage at 350 mA to the output. It
is enabled with an input to the enable pin. The regulator
voltage is provided by a PNP pass transistor controlled by an
error amplifier with a bandgap reference, which gives it the
lowest possible dropout voltage. The output current
capability is 350 mA, and the base drive quiescent current is
controlled to prevent oversaturation when the input voltage
is low or when the output is overloaded. The integrated
current sense feature provides diagnosis and system
protection functionality. The current limit of the device is
adjustable by resistor connected to CSO pin. Voltage on
CSO pin is proportional to output current. The regulator is
protected by both current limit and thermal shutdown.
Thermal shutdown occurs above 150
°C to protect the IC
during overloads and extreme ambient temperatures.
The error amplifier compares the reference voltage to a
sample of the output voltage (Vout) and drives the base of a
PNP series pass transistor via a buffer. The reference is a
bandgap design to give it a temperature−stable output.
Saturation control of the PNP is a function of the load current
and input voltage. Oversaturation of the output power
device is prevented, and quiescent current in the ground pin
is minimized.
Regulator Stability Considerations
The input capacitor (Cin) is necessary to stabilize the input
impedance to avoid voltage line influences. The output
capacitor (Cout) helps determine three main characteristics
of a linear regulator: startup delay, load transient response
and loop stability. The capacitor value and type should be
based on cost, availability, size and temperature constraints.
The aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
°C to −40°C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information. The value for the
output capacitor Cout, shown in Figure 1 should work for
most applications; see also Figure 17 for output stability at
various load and Output Capacitor ESR conditions. Stable
region of ESR in Figure 17 shows ESR values at which the
LDO output voltage does not have any permanent
oscillations at any dynamic changes of output load current.
Marginal ESR is the value at which the output voltage
waving is fully damped during four periods after the load
change and no oscillation is further observable.
ESR characteristics were measured with ceramic
capacitors and additional series resistors to emulate ESR.
Low duty cycle pulse load current technique has been used
to maintain junction temperature close to ambient
Calculating Bypass Capacitor
If usage of low ESR ceramic capacitors is demanded,
connect the bypass capacitor Cb between Adjustable Input
pin and Vout pin according to Applications circuit at
Figure 1. Parallel combination of bypass capacitor Cb with
the feedback resistor R1 contributes in the device transfer
function as an additional zero and affects the device loop
stability, therefore its value must be optimized. Attention to
the Output Capacitor value and its ESR must be paid. See
also Stability in High Speed Linear LDO Regulators
Application Note, AND8037/D for more information.
Optimal value of bypass capacitor is given by following
Cb +
(eq. 1)
R1 − the upper feedback resistor
fz − the frequency of the zero added into the device
transfer function by R1 and Cb external components.
Set the R1 resistor according to output voltage requirement.
Chose the fz with regard on the output capacitance Cout, refer
to the table below.
Cout (mF)
fZ range (kHz)
Ceramic capacitors and its part numbers listed bellow
have been used as low ESR output capacitors Cout from the
table above to define the frequency ranges of additional zero
required for stability:
GRM31CR71C106KAC7 (10
mF, 16 V, X7R, 1206)
GRM32ER71C226KE18 (22
mF, 16 V, X7R, 1210)
GRM32ER61C476ME15 (47
mF, 16 V, X5R, 1210)
GRM32ER60J107ME20 (100
mF, 6.3 V, X5R, 1210)
Enable Input
The enable pin is used to turn the regulator on or off. By
holding the pin down to a voltage less than 0.99 V, the output
of the regulator will be turned off. When the voltage on the
enable pin is greater than 2.31 V, the output of the regulator
will be enabled to power its output to the regulated output
voltage. The enable pin may be connected directly to the
input pin to give constant enable to the output regulator.
Setting the Output Voltage
The output voltage range can be set between 5 V and 20 V.
This is accomplished with an external resistor divider
feeding back the voltage to the IC back to the error amplifier
by the voltage adjust pin ADJ. The internal reference voltage
is set to a temperature stable reference (VREF1) of 1.275 V.

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