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AD7528LR Datasheet(PDF) 7 Page - Analog Devices |
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AD7528LR Datasheet(HTML) 7 Page - Analog Devices |
7 / 8 page AD7528 REV. B –7– CIRCUIT EQUATIONS CC R R R R 12 12 4 5 == = ,, f RC Q R R R R A R R C F FBB O F S = =× = 1 21 1 3 4 1 π – NOTE DAC Equivalent Resistance Equals 256 ×() DAC Ladder sis ce DAC Digital Code Re tan MICROPROCESSOR INTERFACE ADDRESS BUS A** A + 1** ADDRESS DECODE LOGIC DAC A/DAC B CS DAC A DB0 DB7 WR VMA 2 AD7528* DAC B DATA BUS D0–D7 A0–A15 CPU 6800 *ANALOG CIRCUITRY HAS BEEN OMITTED FOR CLARITY **A = DECODED 7528 ADDR DAC A A + 1 = DECODED 7528 ADDR DAC B Figure 11. AD7528 Dual DAC to 6800 CPU Interface ADDRESS BUS A** A + 1** DAC A/DAC B CS DAC A DB0 DB7 WR AD7528* DAC B ADDR/DATA BUS AD0–AD7 A8–A15 CPU 8085 *ANALOG CIRCUITRY HAS BEEN OMITTED FOR CLARITY **A = DECODED 7528 ADDR DAC A A + 1 = DECODED 7528 ADDR DAC B NOTE: 8085 INSTRUCTION SHLD (STORE H & L DIRECT) CAN UPDATE BOTH DACs WITH DATA FROM H AND L REGISTERS ADDRESS DECODE LOGIC LATCH 8212 WR ALE Figure 12. AD7528 Dual DAC to 8085 CPU Interface PROGRAMMABLE WINDOW COMPARATOR VREF A RFB A VCC DATA INPUTS DAC A/DAC B CS WR PASS/ FAIL OUTPUT 1k AD7528 DB0 DB7 DAC A DAC B OUT A VDD VREF B +VREF RFB B 3 2 7 AD311 COMPARATOR OUT B 3 2 7 AD311 COMPARATOR TEST INPUT 0 TO –VREF Figure 13. Digitally Programmable Window Comparator (Upper and Lower Limit Detector) PROGRAMMABLE STATE VARIABLE FILTER In this state variable or universal filter configuration (Figure 14) DACs A1 and B1 control the gain and Q of the filter character- istic while DACs A2 and B2 control the cutoff frequency, fC. DACs A2 and B2 must track accurately for the simple expres- sion for fC to hold. This is readily accomplished by the AD7528. Op amps are 2 × AD644. C3 compensates for the effects of op amp gain bandwidth limitations. DAC A/DAC B CS WR VIN VDD DB0–DB7 DATA 1 DAC B1 RF AD7528 DAC A/DAC B CS WR A3 VDD DB0–DB7 DATA 2 AD7528 A2 A1 R3 10k DAC A1 RS DAC A2 R1 HIGH PASS OUTPUT R4 30k R5 30k C3 47pF C1 1000pF DAC B2 R2 A4 C2 1000pF LOW PASS OUTPUT BAND PASS OUTPUT Figure 14. Digitally Controlled State Variable Filter The filter provides low pass, high pass and band pass outputs and is ideally suited for applications where microprocessor control of filter parameters is required, e.g., equalizer, tone controls, etc. Programmable range for component values shown is fC = 0 kHz to 15 kHz and Q = 0.3 to 4.5. In the circuit of Figure 13 the AD7528 is used to implement a programmable window comparator. DACs A and B are loaded with the required upper and lower voltage limits for the test, respectively. If the test input is not within the programmed limits, the pass/fail output will indicate a fail (logic zero). |
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Descripción similar - AD7528LR |
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