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AD7710AQ Datasheet(PDF) 1 Page - Analog Devices

No. de pieza AD7710AQ
Descripción Electrónicos  Signal Conditioning ADC
Download  28 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

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FUNCTIONAL BLOCK DIAGRAM
REV. F
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Signal Conditioning ADC
AD7710*
FEATURES
Charge Balancing ADC
24 Bits No Missing Codes
0.0015% Nonlinearity
Two-Channel Programmable Gain Front End
Gains from 1 to 128
Differential Inputs
Low-Pass Filter with Programmable Filter Cutoffs
Ability to Read/Write Calibration Coefficients
Bidirectional Microcontroller Serial Interface
Internal/External Reference Option
Single or Dual Supply Operation
Low Power (25 mW typ) with Power-Down Mode
(7 mW typ)
APPLICATIONS
Weigh Scales
Thermocouples
Process Control
Smart Transmitters
Chromatography
GENERAL DESCRIPTION
The AD7710 is a complete analog front end for low frequency
measurement applications. The device accepts low level signals
directly from a strain gage or transducer and outputs a serial
digital word. It employs a sigma-delta conversion technique to
realize up to 24 bits of no missing codes performance. The input
signal is applied to a proprietary programmable gain front end
based around an analog modulator. The modulator output is
processed by an on-chip digital filter. The first notch of this
digital filter can be programmed via the on-chip control register
allowing adjustment of the filter cutoff and settling time.
The part features two differential analog inputs and a differen-
tial reference input. Normally, one of the channels will be used
as the main channel with the second channel used as an auxil-
iary input to periodically measure a second voltage. It can be
operated from a single supply (by tying the VSS pin to AGND)
provided that the input signals on the analog inputs are more
positive than –30 mV. By taking the VSS pin negative, the part
can convert signals down to –VREF on its inputs. The AD7710
thus performs all signal conditioning and conversion for a single
or dual channel system.
The AD7710 is ideal for use in smart, microcontroller based
systems. Input channel selection, gain settings and signal polar-
ity can be configured in software using the bidirectional serial
port. The AD7710 contains self-calibration, system calibration
and background calibration options and also allows the user to
read and write the on-chip calibration registers.
*Protected by U.S. Patent No. 5,134,401.
CMOS construction ensures low power dissipation and a soft-
ware programmable power down mode reduces the standby
power consumption to only 7 mW typical. The part is available
in a 24-lead, 0.3 inch-wide, plastic and hermetic dual-in-line
package (DIP) as well as a 24-lead small outline (SOIC)
package.
PRODUCT HIGHLIGHTS
1. The programmable gain front end allows the AD7710 to
accept input signals directly from a strain gage or transducer,
removing a considerable amount of signal conditioning.
2. The AD7710 is ideal for microcontroller or DSP processor
applications with an on-chip control register which allows
control over filter cutoff, input gain, channel selection, signal
polarity and calibration modes.
3. The AD7710 allows the user to read and write the on-chip
calibration registers. This means that the microcontroller has
much greater control over the calibration procedure.
4. No missing codes ensures true, usable, 23-bit dynamic range
coupled with excellent
±0.0015% accuracy. The effects of
temperature drift are eliminated by on-chip self-calibration,
which removes zero-scale and full-scale errors.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
CLOCK
GENERATION
SERIAL INTERFACE
CONTROL
REGISTER
OUTPUT
REGISTER
CHARGE-BALANCING A/D
CONVERTER
AUTO-ZEROED
MODULATOR
DIGITAL
FILTER
AD7710
M
U
X
PGA
AGND DGND
MODE SDATA SCLK
A0
MCLK
OUT
MCLK
IN
AIN1(+)
AIN1(–)
REF
IN (–)
REF
IN (+)
SYNC
4.5 A
A = 1 – 128
DRDY
TFS
RFS
REF OUT
2.5V REFERENCE
AVDD
AVDD
20 A
AIN2(+)
AIN2(–)
IOUT
VSS
VBIAS
AVDD
DVDD


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