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AD7822 Datasheet(PDF) 6 Page - Analog Devices

No. de pieza AD7822
Descripción Electrónicos  3 V/5 V, 2 MSPS, 8-Bit, 1-, 4-, 8-Channel Sampling ADCs
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD7822 Datasheet(HTML) 6 Page - Analog Devices

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AD7822/AD7825/AD7829
–6–
REV. B
TERMINOLOGY
Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal-to-(noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the quan-
tization noise. The theoretical signal-to-(noise + distortion) ratio
for an ideal N-bit converter with a sine wave input is given by:
Signal-to-(Noise + Distortion) = (6.02N + 1.76) dB
Thus, for an 8-bit converter, this is 50 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7822/AD7825/AD7829
it is defined as:
THD (dB)
= 20 log
V
2
2
+V
3
2
+V
4
2
+V
5
2
+V
6
2
V1
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5, and V6 are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is deter-
mined by the largest harmonic in the spectrum, but for parts
where the harmonics are buried in the noise floor, it will be a
noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for which
neither m nor n are equal to zero. For example, the second order
terms include (fa + fb) and (fa – fb), while the third order terms
include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).
The AD7822/AD7825/AD7829 are tested using the CCIF stan-
dard where two input frequencies near the top end of the input
bandwidth are used. In this case, the second and third order
terms are of different significance. The second order terms are
usually distanced in frequency from the original sine waves
while the third order terms are usually at a frequency close to
the input frequencies. As a result, the second and third order
terms are specified separately. The calculation of the intermodula-
tion distortion is as per the THD specification where it is the
ratio of the rms sum of the individual distortion products to the
rms amplitude of the fundamental expressed in dBs.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of crosstalk
between channels. It is measured by applying a full-scale 20 kHz
sine wave signal to one input channel and determining how
much that signal is attenuated in each of the other channels.
The figure given is the worst case across all four or eight chan-
nels of the AD7825 and AD7829, respectively.
Relative Accuracy
Relative accuracy or endpoint nonlinearity is the maximum
deviation from a straight line passing through the endpoints of
the ADC transfer function.
Differential Nonlinearity
The difference between the measured and the ideal 1 LSB change
between any two adjacent codes in the ADC.
Offset Error
The deviation of the 128th code transition (01111111) to
(10000000) from the ideal, i.e., VMID.
Offset Error Match
The difference in offset error between any two channels.
Zero-Scale Error
The deviation of the first code transition (00000000) to
(00000001) from the ideal, i.e., VMID – 1.25 V + 1 LSB (VDD =
5 V
± 10%), or V
MID – 1.0 V + 1 LSB (VDD = 3 V
± 10%).
Full-Scale Error
The deviation of the last code transition (11111110) to
(11111111) from the ideal, i.e., VMID + 1.25 V – 1 LSB (VDD =
5 V
± 10%), or V
MID + 1.0 V – 1 LSB (VDD = 3 V
± 10%).
Gain Error
The deviation of the last code transition (1111 . . . 110) to
(1111 . . . 111) from the ideal, i.e., VREF – 1 LSB, after the off-
set error has been adjusted out.
Gain Error Match
The difference in gain error between any two channels.
Track/Hold Acquisition Time
The time required for the output of the track/hold amplifier to
reach its final value, within
±1/2 LSB, after the point at which
the track/hold returns to track mode. This happens approxi-
mately 120 ns after the falling edge of CONVST.
It also applies to situations where a change in the selected input
channel takes place or where there is a step input change on the
input voltage applied to the selected VIN input of the AD7822/
AD7825/AD7829. It means that the user must wait for the dura-
tion of the track/hold acquisition time after a channel change/step
input change to VIN before starting another conversion, to
ensure that the part operates to specification.
PSR (Power Supply Rejection)
Variations in power supply will affect the full-scale transition,
but not the converter’s linearity. Power supply rejection is the
maximum change in the full-scale transition point due to a
change in power supply voltage from the nominal value.
CIRCUIT DESCRIPTION
The AD7822, AD7825, and AD7829 consist of a track-and-hold
amplifier followed by a half-flash analog-to-digital converter.
These devices use a half-flash conversion technique where one
4-bit flash ADC is used to achieve an 8-bit result. The 4-bit
flash ADC contains a sampling capacitor followed by fifteen
comparators that compare the unknown input to a reference
ladder to achieve a 4-bit result. This first flash, i.e., coarse con-
version, provides the 4 MSBs. For a full 8-bit reading to be
realized, a second flash, i.e., a fine conversion, must be per-
formed to provide the 4 LSBs. The 8-bit word is then placed on
the data output bus.


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