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AD7829 Datasheet(PDF) 9 Page - Analog Devices |
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AD7829 Datasheet(HTML) 9 Page - Analog Devices |
9 / 20 page AD7822/AD7825/AD7829 –9– REV. B VREF VMID VIN R3 R4 R2 R1 V V 0V VIN 0V 2.5V AD7822/ AD7825/ AD7829 2.5V Figure 9. Accommodating Bipolar Signals Using External VMID R2 VREF VMID VIN EXTERNAL 2.5V R3 R4 R1 V V 0V VIN 0V VMID AD7822/ AD7825/ AD7829 Figure 10. Accommodating Bipolar Signals Using Internal VMID NOTE: Although there is a VREF pin from which a voltage refer- ence of 2.5 V may be sourced, or to which an external reference may be applied, this does not provide an option of varying the value of the voltage reference. As stated in the specifications for the AD7822, AD7825, and AD7829, the input voltage range at this pin is 2.5 V ± 2%. Analog Input Structure Figure 11 shows an equivalent circuit of the analog input structure of the AD7822, AD7825, and the AD7829. The two diodes, D1 and D2, provide ESD protection for the analog inputs. Care must be taken to ensure that the analog input signal never exceeds the supply rails by more than 200 mV. This will cause these diodes to become forward biased and start conducting current into the substrate. 20 mA is the maximum current these diodes can conduct without causing irreversible damage to the part. How- ever, it is worth noting that a small amount of current (1 mA) being conducted into the substrate due to an over voltage on an unselected channel, can cause inaccurate conversions on a selected channel. The capacitor C2 in Figure 11 is typically about 4 pF and can be primarily attributed to pin capacitance. The resistor, R1, is a lumped component made up of the on resistance of several components, including that of the multi- plexer and the track and hold. This resistor is typically about 310 Ω. The capacitor C1 is the track-and-hold capacitor and has a capacitance of 0.5 pF. Switch 1 is the track-and-hold switch, while Switch 2 is that of the sampling capacitor as shown in Figures 2 and 3. VIN C2 4pF D1 D2 R1 310 SW1 C1 0.5pF A B SW2 VDD Figure 11. Equivalent Analog Input Circuit When in track phase, Switch 1 is closed and Switch 2 is in Position A; when in hold mode, Switch 1 opens while Switch 2 remains in Position A. The track-and-hold remains in hold mode for 120 ns—see Circuit Description—after which it returns to track mode and the ADC enters its conversion phase. At this point, Switch 1 opens and Switch 2 moves to Position B. At the end of the conversion, Switch 2 moves back to Position A. Analog Input Selection On power-up, the default VIN selection is VIN1. When returning to normal operation from power-down, the VIN selected will be the same one that was selected prior to power-down being initiated. Table II below shows the multiplexer address corresponding to each analog input from VIN1 to VIN4(8) for the AD7825 or AD7829. Table II. A2 A1 A0 Analog Input Selected 00 0 VIN1 00 1 VIN2 01 0 VIN3 01 1 VIN4 10 0 VIN5 10 1 VIN6 11 0 VIN7 11 1 VIN8 Channel selection on the AD7825 and AD7829 is made without the necessity of a write operation. The address of the next channel to be converted is latched at the start of the current read operation, i.e., on the falling edge of RD while CS is low, as shown in Figure 12. This allows for improved throughput rates in “channel hopping” applications. |
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Descripción similar - AD7829 |
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