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AD7892AN-2 Datasheet(PDF) 6 Page - Analog Devices

No. de pieza AD7892AN-2
Descripción Electrónicos  LC2MOS Single Supply, 12-Bit 600 kSPS ADC
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Fabricante Electrónico  AD [Analog Devices]
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AD7892AN-2 Datasheet(HTML) 6 Page - Analog Devices

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AD7892
–6–
REV. C
PIN FUNCTION DESCRIPTION
Pin
No.
Mnemonic
Description
1VDD
Positive Supply Voltage, +5 V
± 5%.
2
STANDBY
Standby Input. Logic Input. With this input at a logic high, the part is in its normal operating
mode; with this input at a logic low, the part is placed in its standby or power-down mode, which
reduces power consumption to 5 mW typical.
3VIN2
Analog Input 2. For the AD7892-1, this input either connects to AGND or to VIN1 to determine
the analog input voltage range. With VIN2 connected to AGND on the AD7892-1, the analog input
range at the VIN1 input is
±10 V. With V
IN2 connected to VIN1 on the AD7892-1, the analog input
range to the part is
±5V.
For the AD7892-2 and AD7892-3, this input can be left unconnected but must not be connected
to a potential other than AGND.
4VIN1
Analog Input 1. The analog input voltage to be converted by the AD7892 is applied to this input.
For the AD7892-1, the input voltage range is either
±5 V or ±10 V depending on where the VIN2
input is connected. For the AD7892-2, the voltage range on the VIN1 input is 0 V to +2.5 V with
respect to the voltage appearing at the VIN2 input. For the AD7892-3, the voltage range on the VIN1
input is
±2.5 V.
5
REF OUT/REF IN
Voltage Reference Output/Input. The part can be used with either its own internal reference or with
an external reference source. The on-chip +2.5 V reference is provided at this pin. When using this
internal reference as the reference source for the part, REF OUT should be decoupled to AGND
with a 0.1
µF disc ceramic capacitor. The output impedance of this reference source is typically
5.5 k
Ω. When using an external reference source as the reference voltage for the part, the reference
source should be connected to this pin. This overdrives the internal reference and provides the
reference source for the part. The REF IN input is buffered on-chip but must be able to sink or
source current through the resistor to the output of the on-chip reference. The nominal reference
voltage for correct operation of the AD7892 is +2.5 V.
6
AGND
Analog Ground. Ground reference for track/hold, comparator and DAC.
7
MODE
Mode. Control input which determines the interface mode for the AD7892. With this pin at a logic
low, the device is in its serial interface mode; with this pin at a logic high, the device is in its parallel
interface mode.
8
DB11/LOW
Data Bit 11/Test Pin. When the device is in its parallel mode, this pin is Data Bit 11 (MSB), a
three-state TTL-compatible output. When the device is in its serial mode, this is used as a test pin
which must be tied to a logic low for correct operation of the AD7892.
9
DB10/LOW
Data Bit 10/Test Pin. When the device is in its parallel mode, this pin is Data Bit 10, a three-state
TTL-compatible output. When the device is in its serial mode, this is used as a test pin which must
be tied to a logic low for correct operation of the AD7892.
10
DB9
Data Bit 9. Three-state TTL-compatible output. This output should be left unconnected when the
device is in its serial mode.
11
DB8
Data Bit 8. Three-state TTL-compatible output. This output should be left unconnected when the
device is in its serial mode.
12
DB7
Data Bit 7. Three-state TTL-compatible output. This output should be left unconnected when the
device is in its serial mode.
13
DB6
Data Bit 6. Three-state TTL-compatible output. This output should be left unconnected when the
device is in its serial mode.
14
DGND
Digital Ground. Ground reference for digital circuitry.
15
DB5/SDATA
Data Bit 5/Serial Data. When the device is in its parallel mode, this pin is Data Bit 5, a three-state
TTL-compatible output. When the device is in its serial mode, this becomes the serial data output
line. Sixteen bits of serial data are provided with four leading zeros preceding the 12 bits of valid
data. Serial data is valid on the falling edge of SCLK for sixteen edges after
RFS goes low. Output
coding is two’s complement for AD7892-1 and AD7892-3 and straight (natural) binary for
AD7892-2.


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