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AD845KN Datasheet(PDF) 8 Page - Analog Devices |
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AD845KN Datasheet(HTML) 8 Page - Analog Devices |
8 / 8 page AD845 REV. D –8– Figure 28a. Settling Time of the Three Op Amp Instru- mentation Amplifier. Horizontal Scale: 200 ns/Div; Vertical Scale, Positive Pulse Input: 5 V/Div; Output Settling: 1 mV/Div DRIVING THE ANALOG INPUT OF AN A/D CONVERTER An op amp driving the analog input of an A/D converter, such as that shown in Figure 29, must be capable of maintaining a constant output voltage under dynamically changing load condi- tions. In successive approximation converters, the input current is compared to a series of switched trial currents. The compari- son point is diode clamped but may deviate several hundred millivolts resulting in high frequency modulation of A/D input current. The output impedance of a feedback amplifier is made artificially low by the loop gain. At high frequencies, where the loop gain is low, the amplifier output impedance can approach its open-loop value. Most IC amplifiers exhibit a minimum open-loop output impedance of 25 Ω due to current limiting re- sistors. A few hundred microamps reflected from the change in converter loading can introduce errors in instantaneous input voltage. If the A/D conversion speed is not excessive and the bandwidth of the amplifier is sufficient, the amplifier’s output will return to the nominal value before the converter makes its comparison. However, many amplifiers have relatively narrow bandwidth yielding slow recovery from output transients. The Figure 28b. Settling Time of the Three Op Amp Instru- mentation Amplifier. Horizontal Scale: 200 ns/Div; Vertical Scale, Negative Pulse Input: 5 V/ Div; Output Settling: 1 mV/Div AD845 is ideally suited to drive high resolution A/D converters with 5 µs on longer conversion times since it offers both wide bandwidth and high open-loop gain. Figure 29. AD845 As ADC Unity Gain Buffer OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Mini-DIP (N) Package Cerdip (Q) Package |
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