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AD9713BAP Datasheet(PDF) 3 Page - Analog Devices |
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AD9713BAP Datasheet(HTML) 3 Page - Analog Devices |
3 / 12 page AD9712B AD9713B Test All Grades All Grades Parameter (Conditions) Temp Level Min Typ Max Min Typ Max Units POWER SUPPLY 13 Positive Supply Current (+5.0 V) +25 °CI 6 12 mA Full VI 14 mA Negative Supply Current (–5.2 V) 14 +25 °C I 140 178 145 184 mA Full VI 183 188 mA Nominal Power Dissipation +25 °C V 728 784 mW Power Supply Rejection Radio (PSRR) 15 +25 °C I 30 100 30 100 µA/V NOTES 1Measured as error in ratio of full-scale current to current through R SET (160 µA nominal); ratio is nominally 128. 2Full-scale variations among devices are higher when driving REFERENCE INPUT directly. 3Frequency at which the gain is flat ±0.5 dB; R L = 50 Ω; 50% modulation at midscale. 4Based on I FS = 128 (VREF/RSET) when using internal amplifier. 5Data registered into DAC accurately at this rate; does not imply settling to 12-bit accuracy. 6Measured as voltage settling at midscale transition to ± 0.024%, R L = 50 Ω. 7Measured as the time between the 50% point of the falling edge of LATCH ENABLE and the point where the output signal has left a 1 LSB error band around its previous value. 8Peak glitch impulse is measured as the largest area under a single positive or negative transient. 9Measured with R L = 50 Ω and DAC operating in latched mode. 10Data must remain stable for specified time prior to falling edge of LATCH ENABLE signal. 11Data must remain stable for specified time after rising edge of LATCH ENABLE signal. 12SFDR is defined as the difference in signal energy between the fundamental and worst case spurious frequencies in the output spectrum window, which is centered at the fundamental frequency and covers the indicated span. 13Supply voltages should remain stable within ±5% for normal operation. 14108 mA typ on Digital –V S, 37 mA typ on Analog –VS. 15Measured at ± 5% of +V S (AD9713B only) and –VS (AD9712B or AD9713B) using external reference. Specifications subject to change without notice. ORDERING GUIDE Temperature Package Package Model Range Description Option AD9712BAN –25 °C to +85°C 28-Pin PDIP N-28 AD9712BBN –25 °C to +85°C 28-Pin PDIP N-28 AD9712BAP –25 °C to +85°C 28-Pin PLCC P-28A AD9712BBP –25 °C to +85°C 28-Pin PLCC P-28A AD9712BSQ/883B –55 °C to +125°C 28-Pin Cerdip Q-28 AD9712BSE/883B –55 °C to +125°C 28-Pin LCC E-28A AD9712BTQ/883B –55 °C to +125°C 28-Pin Cerdip Q-28 AD9712BTE/883B –55 °C to +125°C 28-Pin LCC E-28A AD9713BAN –25 °C to +85°C 28-Pin PDIP N-28 AD9713BBN –25 °C to +85°C 28-Pin PDIP N-28 AD9713BAP –25 °C to +85°C 28-Pin PLCC P-28A AD9713BBP –25 °C to +85°C 28-Pin PLCC P-28A AD9713BSQ/883B –55 °C to +125°C 28-Pin Cerdip Q-28 AD9713BSE/883B –55 °C to +125°C 28-Pin LCC E-28A AD9713BTQ/883B –55 °C to +125°C 28-Pin Cerdip Q-28 AD9713BTE/883B –55 °C to +125°C 28-Pin LCC E-28A EXPLANATION OF TEST LEVELS Test Level I – 100% production tested. II – 100% production tested at +25 °C, and sample tested at specified temperatures. III – Sample tested only. IV – Parameter is guaranteed by design and characterization testing. V – Parameter is a typical value only. VI – All devices are 100% tested at +25 °C. 100% production tested at temperature extremes for extended tempera- ture devices; sample tested at temperature extremes for commercial/industrial devices. ABSOLUTE MAXIMUM RATINGS 1 Positive Supply Voltage (+VS) (AD9713B Only) . . . . . . . +6 V Negative Supply Voltage (–VS) . . . . . . . . . . . . . . . . . . . . . –7 V Analog-to-Digital Ground Voltage Differential . . . . . . . . 0.5 V Digital Input Voltages (D1–D12, LATCH ENABLE) AD9712B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to –VS AD9713B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to +VS Internal Reference Output Current . . . . . . . . . . . . . . . . 500 µA Control Amplifier Input Voltage Range . . . . . . . . . 0 V to –4 V Control Amplifier Output Current . . . . . . . . . . . . . . . ±2.5 mA Reference Input Voltage Range (VREF) . . . . . . . . . . . 0 V to –VS Analog Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Operating Temperature Range AD9712B/AD9713BAN/AP/BN/BP . . . . . . . –25 °C to +85°C AD9712B/AD9713BSE/SQ/TE/TQ . . . . . . –55 °C to +125°C Maximum Junction Temperature 2 AD9712B/AD9713BAN/AP/BN/BP . . . . . . . . . . . . . +150 °C AD9712B/AD9713BSE/SQ/TE/TQ . . . . . . . . . . . . . +175 °C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300 °C Storage Temperature Range . . . . . . . . . . . . . –65 °C to +150°C NOTES 1Absolute maximum ratings are limiting values to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability. 2Typical thermal impedances with parts soldered in place: 28-pin plastic DIP: θ JA = 37 °C/W, θ JC = 10 °C/W; 28-pin PLCC: θ JA = 44 °C/W, θ JC = 14 °C/W; Cerdip: θ JA = 32 °C/W, θ JC = 10 °C/W; LCC: θ JA = 41 °C/W, θ JC = 13 °C/W. No air flow. AD9712B/AD9713B REV. B –3– |
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