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AD9835BRU Datasheet(PDF) 4 Page - Analog Devices

No. de pieza AD9835BRU
Descripción Electrónicos  50 MHz CMOS Complete DDS
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD9835BRU Datasheet(HTML) 4 Page - Analog Devices

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AD9835
–4–
REV. 0
ABSOLUTE MAXIMUM RATINGS*
(TA = +25
°C unless otherwise noted)
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
AGND to DGND. . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Digital I/O Voltage to DGND . . . . . –0.3 V to DVDD + 0.3 V
Analog I/O Voltage to AGND . . . . . –0.3 V to AVDD + 0.3 V
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40
°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . .+150
°C
TSSOP
θ
JA Thermal Impedance
. . . . . . . . . . . . . . . 158
°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220
°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 4500 V
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option*
AD9835BRU
–40
°C to +85°C
16-Lead TSSOP RU-16
*RU = Thin Shrink Small Outline Package (TSSOP).
PIN CONFIGURATION
14
13
12
11
16
15
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
AD9835
FS ADJUST
AGND
IOUT
AVDD
COMP
REFIN
REFOUT
DVDD
FSELECT
PSEL1
PSEL0
DGND
MCLK
SCLK
SDATA
FSYNC
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The end-
points of the transfer function are zero scale, a point 0.5 LSB
below the first code transition (000 . . . 00 to 000 . . . 01)
and full scale, a point 0.5 LSB above the last code transition
(111 . . . 10 to 111 . . . 11). The error is expressed in LSBs.
Differential Nonlinearity
This is the difference between the measured and ideal 1 LSB
change between two adjacent codes in the DAC.
Signal to (Noise + Distortion)
Signal to (Noise + Distortion) is measured signal to noise at the
output of the DAC. The signal is the rms magnitude of the
fundamental. Noise is the rms sum of all the nonfundamental
signals up to half the sampling frequency (fMCLK/2) but exclud-
ing the dc component. Signal to (Noise + Distortion) is depen-
dent on the number of quantization levels used in the digitization
process; the more levels, the smaller the quantization noise.
The theoretical Signal to (Noise + Distortion) ratio for a sine
wave input is given by
Signal to (Noise + Distortion) = (6.02N + 1.76) dB
where N is the number of bits. Thus, for an ideal 10-bit con-
verter, Signal to (Noise + Distortion) = 61.96 dB.
Total Harmonic Distortion
Total Harmonic Distortion (THD) is the ratio of the rms sum
of harmonics to the rms value of the fundamental. For the
AD9835, THD is defined as
THD
= 20 log
(V 2
2 +V
3
2 +V
4
2 +V
5
2 +V
6
2
)
V1
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5 and V6 are the rms amplitudes of the second through the
sixth harmonic.
Output Compliance
The output compliance refers to the maximum voltage that can
be generated at the output of the DAC to meet the specifica-
tions. When voltages greater than that specified for the output
compliance are generated, the AD9835 may not meet the speci-
fications listed in the data sheet.
Spurious Free Dynamic Range
Along with the frequency of interest, harmonics of the funda-
mental frequency and images of the MCLK frequency are
present at the output of a DDS device. The spurious free dy-
namic range (SFDR) refers to the largest spur or harmonic
present in the band of interest. The wideband SFDR gives the
magnitude of the largest harmonic or spur relative to the magni-
tude of the fundamental frequency in the bandwidth
±2 MHz
about the fundamental frequency. The narrow band SFDR gives
the attenuation of the largest spur or harmonic in a bandwidth of
±50 kHz about the fundamental frequency.
Clock Feedthrough
There will be feedthrough from the MCLK input to the analog
output. Clock feedthrough refers to the magnitude of the
MCLK signal relative to the fundamental frequency in the
AD9835’s output spectrum.


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