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ISL37231DRAZ-TS Datasheet(PDF) 6 Page - Intersil Corporation |
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ISL37231DRAZ-TS Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 9 page ISL37231 6 FN8266.1 January 25, 2013 Electrical Characteristics T A = +25°C, VDD1 = 1.0V, VDD18 = 1.8V, unless otherwise noted PARAMETERS SYMBOL CONDITION MIN (Note 12) TYP MAX (Note 12) UNITS NOTES 1.0V Supply Current (Combination of all 1V Supplies) IDD1 Both lanes active, after equalizer has trained and is static, no eye monitors enabled 430 510 mA No lanes active, but microcontroller awake 85 150 mA Sleep Mode 4 mA 8 1.8V Supply Current (Combination of all 1.8V Supplies) IDD18 Both lanes active, after equalizer has trained and is static, no eye monitors enabled 25 55 mA No lanes active, but microcontroller awake 9 20 mA Sleep Mode 330 µA 8 Return Loss Limit (Differential) SDD11 SDD22 0.05GHz to 2GHz -10 dB 9 2GHz to 5.2GHz -6 dB 9 5.2GHz to 7GHz -5 dB 9 Return Loss Limit (Common Mode) SCC11 SCC22 10MHz to 5GHz -5 dB 9 Return Loss Limit (Diff. to Com. Conversion) SCD11 SCD22 10MHz to 5GHz -20 dB 9 Input Equalization Range EQ gain at 5GHz compared to DC. Set to minimum gain 6 dB 10 EQ gain at 5GHz compared to DC. Set to maximum gain 16.5 dB 10 Input Equalization Increment 10 steps covering the Equalization range 1.5 dB Output De-Emphasis Level Range Off-ramp channels optimized for PCB dielectric loss. On-ramp channels optimized for cable skin loss. Minimum setting 0 dB Off-ramp channels optimized for PCB dielectric loss. On-ramp channels optimized for cable skin loss. Maximum setting 9 dB De-Emphasis Increment 1dB Number of De-Emphasis Taps 3 11 Output Differential Amplitude Range VOUT Minimum drive setting 200 mVP-P Maximum drive setting 950 mVP-P Output Differential Amplitude Increment 15 Uniform Steps 50 mVP-P Output Transition Time tr, tf 20% to 80% 45 ps Jitter Transfer Function Bandwidth 5 MHz Total Output Jitter 1E-13 BER; PRBS-31; no low frequency input periodic jitter 0.3 UIP-P SSC Down Spreading Amplitude Tolerance 0.5 % SSC Modulation Rate Tolerance 33-37 kHz NOTES: 8. The specified Sleep Mode currents can only be achieved when the ISL37231 is used in conjunction with the ISL80083 power management IC. 9. Measured with a Vector Network Analyzer with 100Ω -diff impedance and the ISL37231 input/output impedance at setting 0x07 (i.e. 100Ω-diff). 10. The equalization response includes all effects starting from the IC input pins up to the output of the equalization stage. 11. Three de-emphasis taps composed of: 1 pre-cursor + main + 1 post-cursor. 12. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. |
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