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ADMC328YN-XXX-YY Datasheet(PDF) 7 Page - Analog Devices |
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ADMC328YN-XXX-YY Datasheet(HTML) 7 Page - Analog Devices |
7 / 32 page ADMC328 –7– REV. B GENERAL DESCRIPTION The ADMC328 is a low cost, single-chip DSP-based controller, suitable for permanent magnet synchronous motors and brushless dc motors. The ADMC328 integrates a 20 MIPS, fixed-point DSP core with a complete set of motor control and system peripherals that permits fast, efficient development of motor controllers. The DSP core of the ADMC328 is the ADSP-2171, which is completely code compatible with the ADSP-21xx DSP family and combines three computational units, data address generators and a program sequencer. The computational units comprise an ALU, a multiplier/accumulator (MAC) and a barrel shifter. The ADSP-2171 adds new instructions for bit manipulation, multipli- cation ( × squared), biased rounding and global interrupt masking. The system peripherals are the power-on reset circuit (POR), the watchdog timer and a synchronous serial port. The serial port is configurable and double buffered, with hardware support for UART and SCI port emulation. The ADMC328 provides 512 × 24-bit program memory RAM, 4K × 24-bit program memory ROM and 512 × 16-bit data memory RAM. The program memory ROM contains the user- specified program code and is defined using a single metal layer mask. The program and data memory RAM can be used for dynamic data storage. The motor control peripherals of the ADMC328 comprise a 12-bit analog data acquisition system with five analog input channels and one dedicated ISENSE function (combining internal amplification, sampling, and overcurrent PWM shutdown features) and an internal voltage reference. In addition, a three- phase, 16-bit, center-based PWM generation unit can be used to produce high accuracy PWM signals with minimal processor overhead. The ADMC328 also contains two auxiliary PWM outputs, and nine lines of digital I/O. Because the ADMC328 has a limited number of pins, a number of functions such as the auxiliary PWM and the serial commu- nication port are multiplexed with the nine programmable input/ output (PIO) pins. The pin functions can be independently selected to allow maximum flexibility for different applications. BUS EXCHANGE COMPANDING CIRCUITRY DATA ADDRESS GENERATOR #2 DATA ADDRESS GENERATOR #1 14 14 24 16 6 R BUS 16 DMA BUS PMA BUS DMD BUS PMD BUS INSTRUCTION REGISTER INPUT REGS OUTPUT REGS SHIFTER CONTROL LOGIC DM RAM 512 16 PM ROM 4K 24 PM RAM 512 24 SERIAL PORT RECEIVE REG TRANSMIT REG TIMER INPUT REGS OUTPUT REGS MAC INPUT REGS OUTPUT REGS ALU PROGRAM SEQUENCER Figure 3. DSP Core Block Diagram |
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