REV. B

–10–

ADP3806

W to 50 mW, and the

input range of ISET is from 0 V to 4 V. If, for example, a 3 A

In this example, the power is a maximum of 360 mW. Once

current of 125 mA for trickle charging. Components R3, R4,

and C13 provide high frequency filtering for the current

sense signal.

Final Battery Voltage Control

As the battery approaches its final voltage, the ADP3806 switches

from CC mode to CV mode. The change is achieved by the

outputs controls the voltage at the COMP pin. Both amplifiers

can only pull down on COMP, such that when either amplifier

has a positive differential input voltage, its output is not active.

rent is reduced.

ence voltage of 2.5 V. In the case of the ADP3806-12.5 and

ADP3806-12.6, an internal resistor divider sets the selectable

final battery voltage.

When BATSEL is high, the final battery voltage is set to three

cells (12.6 V or 12.525 V). BATSEL can be tied to REG for

cells (16.8 V or 16.7 V). BATSEL has a 2

mA pull-up current as

a fail-safe to select three cells when it is left open.

The reference and internal resistor divider are referenced to the

AGND pin, which should be connected close to the negative

terminal of the battery to minimize sensing errors.

In contrast, the ADP3806 requires external, precision resistors.

The divider ratio should be set to divide the desired final voltage

down to 2.5 V at the BAT pin

R

R

V

V

BATTERY

11

12

2 5

1

=

.

–

(2)

These resistors should have a parallel impedance of approximately

80 k

W to minimize bias current errors. When the ADP3806 is in

shutdown, an internal switch disconnects the BAT pin as shown

in Figure 2. This disconnects the resistor, R11, from the battery

and minimizes leakage. The resistance of the internal switch is

less than 200

W.

SD

BATTERY

R11

412k

0.1%

ADP3806

R12

102k

0.1%

BAT

BATSEL

Figure 2. Battery Sense Disconnect Circuit

Oscillator and PWM

The oscillator generates a triangle waveform between 1 V and

2.5 V, which is compared to the voltage at the COMP pin,

1 V, the duty cycle is zero. Above 2.5 V, the duty cycle reaches

its maximum.

MIN

OFF

TIME

BSTREG

BST

DRVH

SW

IN

DRVL

ADP3806

BOOTSTRAPPED

SYNCHRONOUS DRIVER

CBST

PGND

1V

1V

Q1

Q2

DELAY

DRVLSD

SD

DELAY

CMP3

CMP2

CMP1

+

–

+

–

+

–

Figure 3. Bootstrapped Synchronous Driver