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ADSP-2166 Datasheet(PDF) 3 Page - Analog Devices |
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ADSP-2166 Datasheet(HTML) 3 Page - Analog Devices |
3 / 39 page REV. 0 ADSP-216x –3– Table I. ADSP-216x ROM-Programmed Processor Features Feature 2161 2162 2163 2164 2165 2166 Data Memory (RAM) 1/2K 1/2K 1/2K 1/2K 4K 4K Program Memory (ROM) 8K 8K 4K 4K 12K 12K Program Memory (RAM) 1K 1K Timer •••••• Serial Port 0 (Multichannel) •••••• Serial Port 1 •••••• Supply Voltage 5 V 3.3 V 5 V 3.3 V 5 V 3.3 V Speed Grades (Instruction Cycle Time) 10.24 MHz (97.6 ns) •• 13.00 MHz (76.9 ns) • 16.67 MHz (60 ns) •• • 20.00 MHz (50 ns) • 25 MHz (40 ns) •• Packages 68-Lead PLCC •••• 80-Lead MQFP •••••• Temperature Grades K Commercial, 0 °C to +70°C •••••• B Industrial, –40 °C to +85°C •••••• Development Tools The ADSP-216x processors are supported by a complete set of tools for system development. The ADSP-2100 Family Devel- opment Software includes C and assembly language tools that allow programmers to write code for any of the ADSP-216x processors. The ANSI C compiler generates ADSP-216x assem- bly source code, while the runtime C library provides ANSI- standard and custom DSP library routines. The ADSP-216x assembler produces object code modules that the linker com- bines into an executable file. The processor simulators provide an interactive instruction-level simulation with a reconfigurable, windowed user interface. A PROM splitter utility generates PROM programmer compatible files. EZ-ICE® in-circuit emulators allow debugging of ADSP-21xx systems by providing a full range of emulation functions such as modification of memory and register values and execution breakpoints. EZ-LAB® demonstration boards are complete DSP systems that execute EPROM-based programs. The EZ-Kit Lite is a very low-cost evaluation/development platform that contains both the hardware and software needed to evaluate the ADSP-21xx architecture. Additional details and ordering information are available in the ADSP-2100 Family Software & Hardware Development Tools data sheet (ADDS-21xx-TOOLS). This data sheet can be requested from any Analog Devices sales office or distributor. Additional Information This data sheet provides a general overview of ADSP-216x processor functionality. For detailed design information on the architecture and instruction set, refer to the ADSP-2100 Family User’s Manual, Third Edition, available from Analog Devices. ARCHITECTURE OVERVIEW Figure 1 shows a block diagram of the ADSP-216x architecture. The processors contain three independent computational units: the ALU, the multiplier/accumulator (MAC), and the shifter. The computational units process 16-bit data directly and have provisions to support multiprecision computations. The ALU performs a standard set of arithmetic and logic operations; division primitives are also supported. The MAC performs single-cycle multiply, multiply/add, and multiply/subtract opera- tions. The shifter performs logical and arithmetic shifts, normal- ization, denormalization, and derive exponent operations. The shifter can be used to efficiently implement numeric format control including multiword floating-point representations. The internal result (R) bus directly connects the computational units so that the output of any unit may be used as the input of any unit on the next cycle. A powerful program sequencer and two dedicated data address generators ensure efficient use of these computational units. The sequencer supports conditional jumps, subroutine calls, and returns in a single cycle. With internal loop counters and loop stacks, the ADSP-216x executes looped code with zero overhead—no explicit jump instructions are required to main- tain the loop. Two data address generators (DAGs) provide addresses for simultaneous dual operand fetches (from data memory and program memory). Each DAG maintains and updates four address pointers. Whenever the pointer is used to access data (indirect addressing), it is post-modified by the value of one of four modify registers. A length value may be associated with each pointer to implement automatic modulo addressing for circular buffers. The circular buffering feature is also used by the serial ports for automatic data transfers to (and from) on- chip memory. EZ-ICE and EZ-LAB are registered trademarks of Analog Devices, Inc. |
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