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ADSP-2187LKST-160 Datasheet(PDF) 8 Page - Analog Devices |
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ADSP-2187LKST-160 Datasheet(HTML) 8 Page - Analog Devices |
8 / 32 page REV. 0 ADSP-2187L –8– Table II. Modes of Operations 1 MODE D 2 MODE C 3 MODE B 4 MODE A 5 Booting Method X 0 0 0 BDMA feature is used to load the first 32 program memory words from the byte memory space. Program execution is held off until all 32 words have been loaded. Chip is configured in Full Memory Mode. 6 X 010No Automatic boot operations occur. Program execution starts at external memory location 0. Chip is configured in Full Memory Mode. BDMA can still be used, but the processor does not automatically use or wait for these operations. 0100 BDMA feature is used to load the first 32 program memory words from the byte memory space. Program execution is held off until all 32 words have been loaded. Chip is configured in Host Mode. IACK has active pull- down. (REQUIRES ADDITIONAL HARDWARE.) 0101IDMA feature is used to load any internal memory as desired. Program execu- tion is held off until internal program memory location 0 is written to. Chip is configured in Host Mode. 6 IACK has active pull-down. 1100 BDMA feature is used to load the first 32 program memory words from the byte memory space. Program execution is held off until all 32 words have been loaded. Chip is configured in Host Mode. IACK has active pull- down. (REQUIRES ADDITIONAL HARDWARE.) 1101IDMA feature is used to load any internal memory as desired. Program execu- tion is held off until internal program memory location 0 is written to. Chip is configured in Host Mode. IACK requires external pull-down.6 NOTES 1All mode pins are recognized while RESET is active (low). 2When Mode D = 0 and in host mode, IACK is an active, driven signal and cannot be “wire ORed”. When Mode D = 1 and in host mode, IACK is an open source and requires an external pull-down, multiple IACK pins can be “wire ORed” together. 3When Mode C = 0, Full Memory enabled. When Mode C = 1, Host Memory Mode enabled. 4When Mode B = 0, Auto Booting enabled. When Mode B = 1, no Auto Booting. 5When Mode A = 0, BDMA enabled. When Mode A = 1, IDMA enabled. 6Considered as standard operating settings. Using these configurations allows for easier design and better memory management. MODES OF OPERATION Table II summarizes the ADSP-2187L memory modes. Setting Memory Mode Memory Mode selection for the ADSP-2187L is made during chip reset through the use of the Mode C pin. This pin is multi- plexed with the DSP’s PF2 pin, so care must be taken in how the mode selection is made. The two methods for selecting the value of Mode C are active and passive. Passive configuration involves the use a pull-up or pull-down resistor connected to the Mode C pin. To minimize power con- sumption, or if the PF2 pin is to be used as an output in the DSP application, a weak pull-up or pull-down, on the order of 100 k Ω, can be used. This value should be sufficient to pull the pin to the desired level and still allow the pin to operate as a programmable flag output without undue strain on the processor’s output driver. For minimum power consumption during power-down, reconfigure PF2 to be an input, as the pull-up or pull-down will hold the pin in a known state, and will not switch. Active configuration involves the use of a three-statable ex- ternal driver connected to the Mode C pin. A driver’s output enable should be connected to the DSP’s RESET signal such that it only drives the PF2 pin when RESET is active (low). When RESET is deasserted, the driver should three-state, thus allowing full use of the PF2 pin as either an input or output. To minimize power consumption during power-down, configure the programmable flag as an output when connected to a three- stated buffer. This ensures that the pin will be held at a constant level and not oscillate should the three-state driver’s level hover around the logic switching point. MEMORY ARCHITECTURE The ADSP-2187L provides a variety of memory and peripheral interface options. The key functional groups are Program Memory, Data Memory, Byte Memory, and I/O. Refer to the following figures and tables for PM and DM memory alloca- tions in the ADSP-2187L. PROGRAM MEMORY Program Memory (Full Memory Mode) is a 24-bit-wide space for storing both instruction opcodes and data. The ADSP- 2187L has 32K words of Program Memory RAM on chip, and the capability of accessing up to two 8K external memory over- lay spaces using the external data bus. IACK Configuration Mode D = 0 and in host Mode: IACK is an active, driven signal and cannot be “wire ORed.” Mode D = 1 and in host mode: IACK is an open source and re- quires an external pull-down, but multiple IACK pins can be “wire ORed” together. |
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