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ADSP-21MSP58BST-104 Datasheet(PDF) 1 Page - Analog Devices

No. de pieza ADSP-21MSP58BST-104
Descripción Electrónicos  DSP Microcomputers
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ADSP-21MSP58BST-104 Datasheet(HTML) 1 Page - Analog Devices

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FUNCTIONAL BLOCK DIAGRAM
MEMORY
PROGRAM
MEMORY
4K x 24
(ROM)
ADSP-21msp59
PROGRAM
MEMORY
2K x 24
DATA
MEMORY
2K x 16
ADSP-21msp58/59
ALU
MAC
SHIFTER
ARITHMETIC UNITS
EXTERNAL
ADDRESS
BUS
EXTERNAL
DATA
BUS
HOST
INTERFACE
PORT
SERIAL PORTS
SPORT 0
SPORT 1
TIMER
DAG 1
DAG 2
DATA
ADDRESS
GENERATORS
PROGRAM
SEQUENCER
POWERDOWN
CONTROL
LOGIC
FLAG
DATA MEMORY DATA
DATA MEMORY ADDRESS
PROGRAM MEMORY ADDRESS
ANALOG
INTERFACE
ADSP-2100 BASE
ARCHITECTURE
PROGRAM MEMORY DATA
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
DSP Microcomputers
ADSP-21msp58/59
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
FEATURES
38 ns Instruction Cycle Time (26 MIPS) from 13.00 MHz
Crystal
ADSP-2100 Family Code and Function Compatible with
New Instruction Set Enhanced for Bit Manipulation
Instructions, Multiplication Instructions, Biased
Rounding, and Global Interrupt Masking
2K
24 Words of On-Chip Program Memory RAM
2K
16 Words of On-Chip Data Memory RAM
4K
24 Words of On-Chip Program Memory ROM
(ADSP-21msp59 Only)
8-Bit Parallel Host Interface Port
Analog Interface Provides:
16-Bit Sigma-Delta ADC and DAC
Programmable Gain Stages
On-Chip Anti-Aliasing & Anti-Imaging Filters
8 kHz Sampling Frequency
65 dB ADC, SNR and THD
72 dB DAC, SNR and THD
425 mW Typical Power Dissipation @ 5.0 V @ 38 ns
<1 mW Powerdown Mode with 100 Cycle Recovery
Dual Purpose Program Memory for Both Instruction
and Data Storage
Independent ALU, Multiplier/Accumulator, and Barrel
Shifter Computational Units
Two Independent Data Address Generators
Powerful Program Sequencer Provides:
Zero Overhead Looping
Conditional Instruction Execution
Two Double-Buffered Serial Ports with Companding
Hardware, One Serial Port (SPORT0) has Automatic
Data Buffering
Programmable 16-Bit Interval Timer with Prescaler
Programmable Wait State Generation
Automatic Booting of Internal Program Memory from
Byte-Wide External Memory, e.g., EPROM, or
Through Host Interface Port
Stand-Alone ROM Execution (ADSP-21msp59 Only)
Single-Cycle Instruction Execution
Single-Cycle Context Switch
Multifunction Instructions
Three Edge- or Level-Sensitive External Interrupts
Low Power Dissipation in Standby Mode
100-Lead TQFP
GENERAL DESCRIPTION
The ADSP-21msp58 and ADSP-21msp59 Mixed-Signal Pro-
cessors (MSProcessor
® DSPs) are fully integrated, single-chip
DSPs complete with a high performance analog front end. The
ADSP-21msp58/59 Family is optimized for voice band applica-
tions such as Speech Compression, Speech Processing, Speech
Recognition, Text-to Speech, and Speech-to-Text conversion.
The ADSP-21msp58/59 combines the ADSP-2100 base archi-
tecture (three computation units, data address generators, and
program sequencer) with two serial ports, a host interface port,
an analog front end, a programmable timer, extensive interrupt
capability, and on-chip program and data memory.
The ADSP-21msp58 provides 2K words (24-bit) of program
RAM and 2K words (16-bit) of data memory. The ADSP-
21msp59 provides an additional 4K words (24-bit) of program
ROM. The ADSP-21msp58/59 integrates a high performance
analog codec based on a single chip, voice band codec, the
AD28msp02. Powerdown circuitry is also provided to meet the
low power needs of battery operated portable equipment. The
ADSP-21msp58/59 is available in a 100-pin TQFP package
(thin quad flat package).
In addition, the ADSP-21msp58/59 supports new instructions,
which include bit manipulations–bit set, bit clear, bit toggle,
bit test–new ALU constants, new multiplication instruction
(x squared), biased rounding, and global interrupt masking.
MSProcessor is a registered trademark of Analog Devices, Inc.


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