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EVAL-AD7472CB Datasheet(PDF) 3 Page - Analog Devices

No. de Pieza. EVAL-AD7472CB
Descripción  Evaluation Board for 12-bit high speed, low power, successive-approximation ADC
Descarga  14 Pages
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Fabricante  AD [Analog Devices]
Página de inicio  http://www.analog.com
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EVAL-AD7472CB Datasheet(HTML) 3 Page - Analog Devices

 
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EVAL-AD7472CB
REV. A
–3–
LK11
This link is used to provide a clock signal path to the burst mode circuit generator from either the on-board
clock oscillator or from an extermnal clock source via SK1.
In position "A" the master clock signal is provided from the on-board crystal oscillator.
In position "B" the master clock signal must be provided from an external source via SK1.
SET-UP CONDITIONS
Care should be taken before applying power and signals to the evaluation board to ensure that all link positions are as per the
required operating mode. Table I shows the position in which all the links are set when the evaluation board is sent out. All
links are set for use with the EVAL-CONTROL BOARD.
Table I. Initial Link and Switch Positions
Link No.
Position
Function.
LK1
Inserted
Provides DC bias voltage to the analog bias-up circuit.
LK2
A
The digital logic circuitry is powered from the same voltage as the AD7472.
LK3
A
CLKIN signal is provided by the EVAL-CONTROL BOARD via J1.
LK4
A
CONVST signal is provided by the EVAL-CONTROL BOARD via J1.
LK5
A
RD signal is provided by the EVAL-CONTROL BOARD via J1.
LK6
A
CS signal is provided by the EVAL-CONTROL BOARD via J1.
LK7
A
AD7472 VDRIVE pin is connected to the AD7472 DVDD pin.
LK8
B
VDD
is supplied by the EVAL-CONTROL BOARD via J1.
LK9
B
VSS is supplied by the EVAL-CONTROL BOARD via J1.
LK10
A
The AD7472 Vin pin is connected to the output of the bias-up circuit.
LK11
A
Master clock for burst clock generator is provided from the on-board clock oscillator.


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