DAP

SM74611

SNVS903 – DECEMBER 2012

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

CONNECTION DIAGRAM

Figure 1. D2PAK

PIN DESCRIPTIONS

Pin

DESCRIPTION

NO.

NAME

ANODE

Connect both of these pins to the negative side of the PV cells

CATHODE

Pin 2 and the DAP are shorted internally. Connect the DAP to the positive side of the PV cells

(1)

Pin 1 and Pin 3 should be connected together for proper operation

(2)

Package drawing at the end of datasheet is shown without Pin 2 being trimmed

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ABSOLUTE MAXIMUM RATINGS

(1)

DC Reverse Voltage

30V

Forward Current

15A

Ambient Storage Temperature

-65°C to 125°C

(1)

Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which

operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits

and associated test conditions, see the Electrical Characteristics tables.

RECOMMENDED OPERATING CONDITIONS

(1)

DC Reverse Voltage

28V

-40°C to 125°C

Forward Current

0-15A

(1)

System must be thermally managed so as not to exceed maximum junction temperature

2

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