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AD9508PCBZ Datasheet(PDF) 10 Page - Analog Devices |
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AD9508PCBZ Datasheet(HTML) 10 Page - Analog Devices |
10 / 40 page AD9508 Data Sheet Rev. A | Page 10 of 40 ABSOLUTE MAXIMUM RATINGS Table 10. Parameter Rating Supply Voltage (VDD) 3.6 V Maximum Digital Input Voltage −0.5 V to VDD + 0.5 V CLK and CLK −0.5 V to VDD + 0.5 V Maximum Digital Output Voltage −0.5 V to VDD + 0.5 V Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +85°C Lead Temperature (Soldering 10 sec) 300°C Junction Temperature 150°C The following equation determines the junction temperature on the application PCB: TJ = TCASE + (ΨJT × PD) where: TJ is the junction temperature (°C). TCASE is the case temperature (°C) measured by the customer at the top center of the package. ΨJT is the value as indicated in Table 11. PD is the power dissipation. Values of θJA are provided for package comparison and PCB design considerations. θJA can be used for a first-order approxi- mation of TJ by the following equation: TJ = TA + (θJA × PD) where TA is the ambient temperature (°C). Values of θJC are provided for package comparison and PCB design considerations when an external heat sink is required. Values of θJB are provided for package comparison and PCB design considerations. THERMAL CHARACTERISTICS Thermal characteristics established using JEDEC51-7 and JEDEC51-5 2S2P test boards. Table 11. Thermal Characteristics, 24-Lead LFCSP Symbol Thermal Characteristic (JEDEC51-7 and JEDEC51-5 2S2P Test Boards1) Value2 Unit θJA Junction-to-ambient thermal resistance per JEDEC JESD51-2 (still air) 43.5 °C/W θJMA Junction-to-ambient thermal resistance, 1.0 m/sec airflow per JEDEC JESD51-6 (moving air) 40 °C/W θJMA Junction-to-ambient thermal resistance, 2.5 m/sec airflow per JEDEC JESD51-6 (moving air) 38.5 °C/W θJB Junction-to-board thermal resistance per JEDEC JESD51-8 (still air) 16.2 °C/W θJC Junction-to-case thermal resistance (die-to-heat sink) per MIL-STD-883, Method 1012.1 7.1 °C/W ΨJT Junction-to-top-of-package characterization parameter per JEDEC JESD51-2 (still air) 0.33 °C/W 1 The exposed pad on the bottom of the package must be soldered to ground (VSS) to achieve the specified thermal performance. 2 Results are from simulations. The PCB is a JEDEC multilayer type. Thermal performance for actual applications requires careful inspection of the conditions in the application to determine if they are similar to those assumed in these calculations. ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. |
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