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74ABT16373CSSC Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74ABT16373CSSC Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page © 2005 Fairchild Semiconductor Corporation DS011666 www.fairchildsemi.com March 1994 Revised May 2005 74ABT16373 16-Bit Transparent D-Type Latch with 3-STATE Outputs General Description The ABT16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applica- tions. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in high Z state. Features s Separate control logic for each byte s 16-bit version of the ABT373 s High impedance glitch free bus loading during entire power up and power down cycle s Non-destructive hot insertion capability s Guaranteed latch-up protection Ordering Code: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Connection Diagram Order Number Package Number Package Description 74ABT16373CSSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 74ABT16373CMTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Pin Names Description OEn Output Enable Input (Active LOW) LEn Latch Enable Input D0–D15 Data Inputs O0–O15 Outputs |
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