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74LCX16821MEA Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74LCX16821MEA Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page January 1996 Revised April 1999 © 1999 Fairchild Semiconductor Corporation DS012634.prf www.fairchildsemi.com 74LCX16821 Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs General Description The LCX16821 contains twenty non-inverting D-type flip- flops with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCX16821 is fabricated with an advanced CMOS tech- nology to achieve high speed operation while maintaining CMOS low power dissipation. Features s 5V tolerant inputs and outputs s 2.3V–3.6V VCC specifications provided s 6.2 ns tPD max (VCC = 3.3V), 20 µA ICC max s Power down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s ±24 mA output drive (V CC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Order Number Package Number Package Description 74LCX16821MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74LCX16821MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Pin Names Description OEn Output Enable Input (Active LOW) CLKn Clock Input D0–D19 Inputs O0–O19 Outputs |
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