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74LCX374MTCX_NL Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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74LCX374MTCX_NL Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 12 page www.fairchildsemi.com 2 Logic Symbol Connection Diagrams Pin Assignments for SOIC, SOP, SSOP, TSSOP Pad Assignments for DQFN (Top View) Pin Descriptions Truth Table H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance LOW-to-HIGH Transition O0 Previous O0 before HIGH-to-LOW of CP Functional Description The LCX374 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Opera- tion of the OE input does not affect the state of the flip- flops. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Pin Names Description D0–D7 Data Inputs CP Clock Pulse Input OE Output Enable Input O0–O7 3-STATE Outputs Inputs Outputs Dn CP OE On H LH L LL XL L O0 XX HZ |
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