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74VHCT541ASJ Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74VHCT541ASJ Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page © 2005 Fairchild Semiconductor Corporation DS500013 www.fairchildsemi.com June 1997 Revised April 2005 74VHCT541A Octal Buffer/Line Driver with 3-STATE Outputs General Description The VHCT541A is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissi- pation. The VHCT541A is an octal buffer/line driver designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers. This device is similar in function to the VHCT244A while providing flow-through architecture (inputs on opposite side from outputs). This pinout arrangement makes this device especially useful as an output port for microprocessors, allowing ease of layout and greater PC board density. Protection circuits ensure that 0V to 7V can be applied to the input and output (Note 1) pins without regard to the supply voltage. This device can be used to interface 3V to 5V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mis- matched supply and input voltages. Note 1: Outputs in OFF-state. Features s High Speed: tPD 5.5 ns (typ) at VCC 5V s Low power dissipation: ICC 4 PA (max) at TA 25qC s Power down protection is provided on all inputs and outputs s Pin and function compatible with 74HCT541 Ordering Code: Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbol IEEE/IEC Pin Descriptions Connection Diagram Truth Table H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Order Number Package Number Package Description 74VHCT541AM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74VHCT541ASJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHCT541AMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHCT541AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Pin Names Description OE1, OE2 3-STATE Output Enable Inputs I0 - I7 Inputs O0 - O7 3-STATE Outputs Inputs Outputs OE1 OE2 I LL H H HX X Z XH X Z LLL L |
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