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ADM691AARN-REEL7 Datasheet(PDF) 2 Page - Analog Devices

No. de Pieza. ADM691AARN-REEL7
Descripción  Microprocessor Supervisory Circuits
Descarga  12 Pages
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Fabricante  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADM691AARN-REEL7 Datasheet(HTML) 2 Page - Analog Devices

 
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ADM691A/ADM693A/ADM800L/M–SPECIFICATIONS
–2–
REV. 0
(VCC = 4.75 V to 5.5 V (ADM691A, ADM800L) 4.5 V to 5.5 V (ADM693A, ADM800M) VBATT = +2.8 V, TA = TMIN to TMAX unless otherwise noted)
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
BATTERY BACKUP SWITCHING
VCC, VBATT Operating Voltage Range
0
5.5
V
VOUT Output Voltage
VCC – 0.05
VCC – 0.02
V
IOUT = 25 mA
VCC – 0.3
VCC – 0.2
V
IOUT = 250 mA
VCC to VOUT Output Resistance
0.8
1.2
VCC = 4.5 V
VOUT in Battery Backup Mode
VBATT – 0.3
V
VBATT = 4.5 V, IOUT = 20 mA
VBATT – 0.25
V
VBATT = 2.8 V, IOUT = 10 mA
VBATT – 0.15
V
VBATT = 2.0 V, IOUT = 5 mA
VBATT to VOUT Output Resistance
12
VBATT = 4.5 V
20
VBATT = 2.8 V
25
VBATT = 2.0 V
Supply Current (Excludes IOUT)
70
100
µAV
CC > (VBATT – 1 V)
Supply Current in B. Backup (Excludes IOUT)
0.04
1
µAV
CC < (VBATT – 1.2 V), VBATT = 2.8 V
Battery Standby Current
5.5 V > VCC > VBATT + 0.2 V
(+ = Discharge, – = Charge)
–0.1
+0.02
µA(V
BATT +0.2 V) < VCC , TA = +25°C
–1.0
+0.02
µA(V
BATT +0.2 V) < VCC
Battery Switchover Threshold
VBATT + 0.03
V
Power Up
VCC–VBATT
VBATT – 0.03
V
Power Down
Battery Switchover Hysteresis
60
mV
BATT ON Output Voltage Low
0.1
0.4
V
ISINK = 3.2 mA
0.7
1.5
V
ISINK = 25 mA
BATT ON Output Short Circuit Current
60
mA
Sink Current
1
15
100
µA
Source Current
RESET AND WATCHDOG TIMER
Reset Voltage Threshold
ADM691A, ADM800L
4.5
4.65
4.75
V
ADM693A, ADM800M
4.25
4.40
4.50
V
ADM800L, VCC Falling
4.55
4.70
V
TA = +25°C
ADM800M, VCC Falling
4.3
4.45
V
TA = +25°C
Reset Threshold Hysteresis
15
mV
VCC to RESET Delay
80
µs
Power Down
LOW LINE
to RESET Delay
800
ns
Reset Timeout Period Internal Oscillator
140
200
280
ms
Power Up
Reset Timeout Period External Clock
2048
Cycles
Power Up
Watchdog Timeout Period, Internal Oscillator
1.0
1.6
2.25
s
Long Period
70
100
140
ms
Short Period
Watchdog Timeout Period, External Clock
4096
Cycles
Long Period
1024
Cycles
Short Period
Minimum WDI Input Pulse Width
100
ns
VIL = 0.4, VIH = 0.75 × VCC
RESET
Output Voltage
0.004
0.3
V
ISINK = 50 µA, VCC = 1 V, VBATT = 0 V
0.1
0.4
V
ISINK = 3.2 mA, VCC = 4.25 V
3.5
V
ISOURCE = 1.6 mA, VCC = 5 V
RESET
Output Short Circuit Current
7
20
mA
RESET Output Voltage Low
0.1
0.4
V
ISINK = 3.2 mA
LOW LINE
Output Voltage
0.4
V
ISINK = 3.2 mA, VCC = 4.25 V
3.5
V
ISOURCE = 1 µA, VCC = 5 V
LOW LINE Short Circuit Source Current
1
15
100
µA
WDO
Output Voltage
0.4
V
ISINK = 3.2 mA, VCC = 4.25 V
3.5
V
ISOURCE = 500 µA, VCC = 5 V
WDO Short Circuit Source Current
3
10
mA
WDI Input Threshold
Logic Low
0.8
V
Logic High
0.75
× V
CC
V
WDI Input Current
–50
–10
µA
WDI = 0 V
20
50
µA
WDI = VOUT
POWER FAIL DETECTOR
PFI Input Threshold ADM69xA
1.2
1.25
1.3
V
VCC = 5 V
PFI Input Threshold ADM800L/M
1.225
1.25
1.275
V
VCC = 5 V
PFI Input Current
±0.01
±25
nA
PFO
Output Voltage
0.4
V
ISINK = 3.2 mA
3.5
ISOURCE = 1 µA
PFO
Short Circuit Source Current
1
15
100
µA
PFI
to PFO Delay
25
µsV
IN = –20 mV
60
µsV
IN = 20 mV


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