2

www.fairchildsemi.com

www.fairchildsemi.com

FM27C010

Connection Diagrams

DIP PIN CONFIGURATIONS

Note:

Compatible EPROM pin configurations are shown in the blocks adjacent to the FM27C010 pins.

Commercial Temperature Range

(0

°C to +70°C) V

Parameter/Order Number

Access Time (ns)

FM27C010 Q, V, N 90

90

FM27C010 Q, V, N 120

120

FM27C010 Q, V, N 150

150

Extended Temperature Range

(-40

°C to +85°C) V

Parameter/Order Number

Access Time (ns)

FM27C010 QE, VE, NE 90

90

FM27C010 QE, VE, NE 120

120

FM27C010 QE, VE, NE 150

150

Package Types: FM27C010 Q, N, V XXX

Q = Quartz-Windowed Ceramic DIP package

V = PLCC package

N = Plastic DIP package

• All packages conform to JEDEC standard.

• All versions are guaranteed to function at slower speeds.

Pin Names

A0–A16

Addresses

CE

Chip Enable

OE

Output Enable

O0–O7

Outputs

PGM

Program

XX

Don’t Care (During Read)

PLCC Pin Configuration

Top View

DS800032-10

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

GND

GND

27C040

DIP

FM27C010

XX/PGM

XX

OE

CE

GND

27C256

GND

27C512

27C040

OE

CE/PGM

CE/PGM

OE

CE/PGM

27C256

27C512

OE

CE

5

6

7

8

9

10

11

12

13

29

28

27

26

25

24

23

22

21

14 15 16 17 18 19 20

4

3

2

1 32 31 30

DS800032-3