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TPS65130RGERG4 Datasheet(PDF) 5 Page - Texas Instruments |
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TPS65130RGERG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 34 page www.ti.com FBP VPOS INP Boost Control VIN ENP GND Gate Control VREF PSP Temperature Control Oscillator Inverting Converter Control ENN PSN Gate Control INN BSW FBN PGND OUTN VNEG VREF VREF CP CN PGND PGND VIN VPOS VIN VIN VIN VIN INN TPS65130, TPS65131 SLVS493B – MARCH 2004 – REVISED SEPTEMBER 2004 PIN ASSIGNMENTS (continued) Terminal Functions (continued) TERMINAL I/O DESCRIPTION NAME NO. PSP 9 I Power-save mode enable for boost converter stage (0 V: disabled, VIN: enabled) PSN 11 I Power-save mode enable for inverter stage (0 V: disabled, VIN: enabled) BSW 7 O Gate control pin for external battery switch. This pin goes low when ENP is set high. NC 12, 20 Not connected FUNCTIONAL BLOCK DIAGRAM 5 |
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