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MC145572APB Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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MC145572APB Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
4 / 52 page 5 MC145572EVK LIST OF FIGURES Paragraph Page Number Title Number Figure 1-1. Motorola Silicon Applications and the MC145572EVK . . . . . . . . . . . . . . . . . 7 Figure 1-2. MC145572EVK Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 1-3. MC145572EVK DIP Switch Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 1-4. External Connections to the MC145572EVK . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 2-1. NT Line Interface Schematic and Component Values . . . . . . . . . . . . . . . . . . 14 Figure 2-2. LT Line Interface Schematic and Component Values . . . . . . . . . . . . . . . . . . 14 Figure 2-3. EIA-232 Interface Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 2-4. Access to Bit Error Analyzer Interface Through J22 and J9 Headers . . . . . . 18 Figure 2-5. BERT Gated Clock Ñ 8-Bit Gated Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 2-6. BERT Gated Clock Ñ 10-Bit Gated Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 2-7. Bit Error Rate Test Set-Up NT Side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 2-8. Loop-Back Modes for the MC145572EVK . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 2-9. Power Connector Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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