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AD5204BCPZ10-REEL7 Datasheet(PDF) 8 Page - Analog Devices

No. de pieza AD5204BCPZ10-REEL7
Descripción Electrónicos  4-/6-Channel Digital Potentiometers
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD5204BCPZ10-REEL7 Datasheet(HTML) 8 Page - Analog Devices

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AD5204/AD5206
Rev. C | Page 8 of 20
NC
NC
NC
NC
B3
A3
W3
NC
NC
NC
NC
B4
W4
A4
NC
NOTES
1. NC = NO CONNECT.
2. THE LFCSP PACKAGE HAS AN EXPOSED
PADDLE THAT SHOULD BE CONNECTED TO
GND AND THE ASSOCIATED PCB
GROUND PLATE.
1
2
3
4
5
6
7
8
23
22
21
18
19
20
24
17
9
10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
AD5204
TOP VIEW
(Not to Scale)
VSS
PIN 1
INDICATOR
Figure 7. AD5204 LFCSP Pin Configuration
Table 4. AD5204 LFCSP Pin Function Descriptions
Pin No.
Name
Description
1
VSS
Negative Power Supply. This pin is specified for operation at both 0 V and −2.7 V. It is the sum of |VDD| + |VSS| < 5.5 V.
2 to 5, 9,
16, 17,
21 to 24
NC
Not Connected.
6
B3
Terminal B RDAC 3.
7
W3
Wiper RDAC 3. Address = 0102.
8
A3
Terminal A RDAC 3.
10
B1
Terminal B RDAC 1.
11
W1
Wiper RDAC 1. Address = 0002.
12
A1
Terminal A RDAC 1.
13
A2
Terminal A RDAC 2.
14
W2
Wiper RDAC 2. Address = 0012.
15
B2
Terminal B RDAC 2.
18
A4
Terminal A RDAC 4.
19
W4
Wiper RDAC 4. Address = 0112.
20
B4
Terminal B RDAC 4.
25
GND
Ground.
26
CS
Chip Select Input (Active Low). When CS returns high, data in the serial input register is decoded based on the address
bits, and then it is loaded into the target RDAC latch.
27
PR
Preset to Midscale (Active Low). This pin sets the RDAC registers to 0x80.
28
VDD
Positive Power Supply. This pin is specified for operation at both 3 V and 5 V. It is the sum of |VDD| + |VSS| < 5.5 V.
29
SHDN
Terminal A Open-Circuit Shutdown (Active Low Input). This pin controls VR 1 through VR 4.
30
SDI
Serial Data Input. Data is input MSB first.
31
CLK
Serial Clock Input. This pin is positive edge triggered.
32
SDO
Serial Data Output. This pin is an open-drain transistor and requires a pull-up resistor.


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