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ADS58C28IRGCR Datasheet(PDF) 2 Page - Texas Instruments |
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ADS58C28IRGCR Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 67 page  ADS58C28 SBAS509B – JUNE 2010 – REVISED OCTOBER 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) SPECIFIED PACKAGE- PACKAGE TEMPERATURE LEAD/BALL PACKAGE ORDERING PRODUCT LEAD DESIGNATOR RANGE ECO PLAN (2) FINISH MARKING NUMBER TRANSPORT MEDIA ADS58C28IRGC Tape and reel GREEN (RoHS, no ADS58C28 QFN-64 RGC –40°C to +85°C Cu/NiPdAu AZ58C28 Sb/Br) ADS58C28IRGC Tape and reel (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. (2) Eco Plan is the planned eco-friendly classification. Green (RoHS, no Sb/Br): TI defines Green to mean Pb-Free (RoHS compatible) and free of Bromine- (Br) and Antimony- (Sb) based flame retardants. Refer to the Quality and Lead-Free (Pb-Free) Data web site for more information. The ADS58C28 is pin-compatible with the previous generation ADS62C17 converter; this architecture enables easy migration. However, there are some important differences between the generations, summarized in Table 1. Table 1. Migrating from the ADS62C17 ADS62C17 ADS58C28 PINS Pin 22 is NC (not connected) Pin 22 is AVDD Pins 38 and 58 are DRVDD Pins 38 and 58 are NC (do not connect pins) Pins 39 and 59 are DRGND Pins 39 and 59 are NC (do not connect pins) SUPPLY AVDD is 3.3V AVDD is 1.8V DRVDD is 1.8V No change INPUT COMMON-MODE VOLTAGE CM is 1.5V CM is 0.95V SERIAL INTERFACE No change in protocol Protocol: 8-bit register address and 8-bit register data New serial register map PARALLEL CONFIGURATION SCLK pin controls internal and external reference mode SCLK pin enables low-speed mode EXTERNAL REFERENCE Supported Not supported 2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): ADS58C28 |
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