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D

Q

LATCH

LATCH

CONVST

CS

CONVST_QUAL

TIMING DIAGRAMS

BUSY

BUSY

BUSY

CONVST_QUAL

Quiet Zones

CS

No Read Zone (CS Initiated)

CS

FS

No Read Zone (FS Initiated)

CONVERSION AND SAMPLING

ADS8382

SLAS416B – JUNE 2004 – REVISED NOVEMBER 2004

Figure 41. Relationship Between CONVST_QUAL, CS, and CONVST

In the following descriptions, the signal CONVST_QUAL represents CONVST latched by a low value on CS (see

Figure 41).

there should be no I/O activities. Interface control signals, including the serial clock should remain steady. Typical

degradation in performance if these quiet zones are not observed is depicted in the specifications section.

Figure 42. Quiet Zones and No-Read Zones

1. Convert start command:

The device enters the conversion phase from the sampling phase when a falling edge is detected on

CONVST_QUAL. This is shown in Figure 43, Figure 44, and Figure 45.

2. Sample (acquisition) start command:

The device starts sampling from the wait/nap state or at the end of a conversion if CONVST is detected as

high and CS as low. This is shown in Figure 43, Figure 44, and Figure 45.

Maintaining this condition (holding CS low) when the device has just finished a conversion (as shown in

Figure 43) takes the device immediately into the sampling phase after the conversion phase (back-to-back

conversion) and hence achieves the maximum throughput. Otherwise, the device enters the wait state or the

nap state.

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