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TPS61161DRVRG4 Datasheet(PDF) 10 Page - Texas Instruments

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No. de pieza TPS61161DRVRG4
Descripción Electrónicos  White LED Driver With Digital and PWM Brightness Control in 2mm x 2mm QFN Package
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

TPS61161DRVRG4 Datasheet(HTML) 10 Page - Texas Instruments

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background image
VBG
200 mV
Error
Amplifier
FB
CTRL
COMP
TPS61160
TPS61161
SLVS791C – NOVEMBER 2007 – REVISED APRIL 2012
www.ti.com
For optimum performance, use the PWM dimming frequency in the range of 5kHz to 100kHz. The requirement of
minimum dimming frequency comes from the EasyScale detection delay and detection time specification in the
dimming mode selection. Since the CTRL pin is logic only pin, adding an external RC filter applied to the pin
does not work.
Figure 14. Block Diagram of Programmable FB Voltage Using PWM Signal
To use lower PWM dimming, add an external RC network connected to the FB pin as shown in the additional
typical application (Figure 19).
DIGITAL 1 WIRE BRIGHTNESS DIMMING
The CTRL pin features a simple digital interface to allow digital brightness control. The digital dimming can save
the processor power and battery life as it does not require a PWM signal all the time, and the processor can
enter idle mode if available.
The TPS61160/1 adopts the EasyScale™ protocol for the digital dimming, which can program the FB voltage to
any of the 32 steps with single command. The step increment increases with the voltage to produce pseudo
logarithmic curve for the brightness step. See the Table 1 for the FB pin voltage steps. The default step is full
scale when the device is first enabled (VFB = 200 mV). The programmed reference voltage is stored in an internal
register. A power reset clears the register value and reset it to default.
EasyScale™: 1 WIRE DIGITAL DIMMING
EasyScale is a simple but flexible one pin interface to configure the FB voltage. The interface is based on a
master-slave structure, where the master is typically a microcontroller or application processor. Figure 15 and
Table 2 give an overview of the protocol. The protocol consists of a device specific address byte and a data byte.
The device specific address byte is fixed to 72 hex. The data byte consists of five bits for information, two
address bits, and the RFA bit. The RFA bit set to high indicates the Request for Acknowledge condition. The
Acknowledge condition is only applied if the protocol was received correctly. The advantage of EasyScale
compared with other on pin interfaces is that its bit detection is in a large extent independent from the bit
transmission rate. It can automatically detect bit rates between 1.7kBit/sec and up to 160kBit/sec.
10
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Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS61160 TPS61161


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