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BU4320F-TR Datasheet(PDF) 1 Page - Rohm

No. de Pieza. BU4320F-TR
Descripción  Low Voltage Free Delay Time Setting CMOS Voltage Detector IC Series
Descarga  16 Pages
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Fabricante  ROHM [Rohm]
Página de inicio  http://www.rohm.com
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BU4320F-TR Datasheet(HTML) 1 Page - Rohm

 
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Product structure
Silicon monolithic integrated circuit
This product is not designed for protection against radioactive rays
.
1/13
Datasheet
TSZ02201-0R7R0G300050-1-2
© 2013 ROHM Co., Ltd. All rights reserved.
22.May.2013 Rev.006
TSZ22111
14
001
www.rohm.com
Voltage Detector IC Series
Low Voltage Free Delay Time Setting
CMOS Voltage Detector IC Series
BU42xx series
BU43xx series
General Description
ROHM’s BU42xx and BU43xx series are CMOS Voltage
Detector ICs with adjustable output delay. It is a
high-accuracy, low current consumption Voltage Detector
IC series with a built-in delay circuit. The lineup was
established with two output types (Nch open drain and
CMOS output) and detection voltages range from 0.9V to
4.8V in increments of 0.1V, so that the series may be
selected according to application.
Features
Delay Time Controlled by external Capacitor
Two output types (Nch open drain and CMOS output)
Ultra-low current consumption
Wide operating temperature range
Very small and low height package
Package SSOP5 and SOP4 is similar to SOT-23-5
and SC-82 respectively (JEDEC)
Key Specifications
Detection voltage:
0.9V to 4.8V (Typ.)
0.1V steps
High accuracy detection voltage:
±1.0%
Ultra-low current consumption:
0.55µA (Typ.)
Operating temperature range:
-40°C to +125°C
Package
SSOP5:
2.90mm x 2.80mm x 1.25mm
SOP4:
2.00mm x 2.10mm x 0.95mm
VSOF5:
1.60mm x 1.60mm x 0.60mm
Applications
Circuits using microcontrollers or logic circuits that require
a reset.
Typical Application Circuit
Connection Diagram & Pin Descriptions
SSOP5
SOP4
VSOF5
PIN
No.
Symbol
Function
PIN
No.
Symbol
Function
PIN
No.
Symbol
Function
1
VOUT
Reset output
1
GND
GND
1
VOUT
Reset output
2
VDD
Power supply voltage
2
VDD
Power supply voltage
2
SUB
Substrate*
3
GND
GND
3
CT
Capacitor connection
terminal
for
output
delay time
3
CT
Capacitor connection
terminal
for
output
delay time
4
N.C.
Unconnected terminal
4
VOUT
Reset output
4
VDD
Power supply voltage
5
CT
Capacitor
connection
terminal
for
output
delay time
5
GND
GND
VDD1
BU42xx
VDD2
GND
CL
(Capacitor for
noise filtering)
CT
RL
CIN
RST
Micro
controller
Open Drain Output type
BU42xx series
VDD1
BU43xx
CIN
GND
CT
CL
(Capacitor for
noise filtering)
RST
Micro
controller
CMOS Output type
BU43xx series
TOP VIEW
TOP VIEW
TOP VIEW
*Connect the substrate to VDD
GND
VDD
CT
VOUT
1
2
3
4
Marking
Lot. No
VOUT
VDD
GND
N.C.
CT
Lot. No
Marking
VDD
VOUT
SUB
CT
GND
4
3
2
1
5
Marking
Lot. No


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