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AD8352 Datasheet(PDF) 1 Page - Analog Devices

No. de pieza AD8352
Descripción Electrónicos  Using the AD8352 as an Ultralow Distortion Differential RF/IF Front End for High Speed ADCs
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Página de inicio  http://www.analog.com
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AD8352 Datasheet(HTML) 1 Page - Analog Devices

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Circuit Note
CN-0046
Circuit Designs Using Analog Devices Products
Apply these product pairings quickly and with confidence.
For more information and/or support call 1-800-AnalogD
(1-800-262-5643) or visit www.analog.com/circuit.
Devices Connected/Referenced
AD8352
Ultralow Distortion Differential
RF/IF Amplifier
AD9445
14-Bit, 105 MSPS/125 MSPS Analog-to-
Digital Converter
Using the AD8352 as an Ultralow Distortion Differential RF/IF Front End
for High Speed ADCs
Rev. A
“Circuits from the Lab” from Analog Devices have been designed and built by Analog Devices
engineers. Standard engineering practices have been employed in the design and construction of
eachcircuit,andtheirfunctionandperformance havebeentestedandverifiedinalabenvironment
atroomtemperature.However,youaresolelyresponsible fortestingthe circuit anddetermining its
suitability and applicability for your use and application. Accordingly, in no event shall Analog
Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due to
anycausewhatsoeverconnectedtotheuseofany“CircuitfromtheLab”. (Continuedonlastpage)
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008–2009 Analog Devices, Inc. All rights reserved.
CIRCUIT FUNCTION AND BENEFITS
These circuits provide both a single-ended and a differential
configuration for driving high speed ADCs using the AD8352
ultralow distortion differential RF/IF amplifier. The AD8352
provides the gain, isolation, and distortion performance
necessary for efficiently driving high linearity converters, such
as the AD9445. This device also provides balanced outputs
whether driven differentially or single-ended, thereby
maintaining excellent second-order distortion levels.
CIRCUIT DESCRIPTION
Figure 1 and Figure 2 illustrate two front-end circuits for
driving the AD9445 14-bit ADC at 105 MSPS. Figure 1
provides a differential input configuration, while Figure 2
provides a single-ended input configuration.
In the differential configuration shown in Figure 1, the input
49.9 Ω resistor provides a differential input impedance to the
50 Ω RF/IF source. When the driver is located less than
approximately one eighth of the wavelength of the maximum
input RF/IF frequency from the AD8352, impedance matching
is not required, thereby eliminating the need for this
termination resistor. The output 24 Ω series resistors provide
isolation from the input capacitance of the ADC, and the
optimum value is determined empirically. The 100 MHz FFT
plots shown in Figure 3 and Figure 4 display the performance
results for the differential configuration.
In the single-ended input configuration shown in Figure 2, the
net input impedance at VIP is RN (200 Ω) plus the external
24.9 Ω balancing resistor, or ~225 Ω. This requires a 64.9 Ω
parallel resistor to provide the input impedance match for a 50 Ω
source. If input reflections are minimal, this impedance match is
not required. The 200 Ω resistor (RN) is required to balance the
output voltages to minimize second-order distortion.
The single-ended configuration provides −3 dB bandwidths
similar to input differential drive and shows little or no
degradation in overall third-order harmonic performance. The
single-ended, third-order distortion levels are similar to the
AD8352
49.9
CD
RD
RG
0.1µF
0.1µF
0.1µF
0.1µF
16
1
2
3
4
5
24
0.1µF
10
24
0.1µF
11
8, 13
14
6, 7, 9, 12
AD9445
50
Ω SOURCE
IF/RF INPUT
MINICIRCUITS
ADT1-1WT
5V
Figure 1. Differential Input to the AD8352 Driving the AD9445 14-Bit, 105 MSPS/125 MSPS ADC
(Simplified Schematic, All Connections Not Shown)


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