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ASDP-21060LCW-160 Datasheet(Hoja de datos) 38 Page - Analog Devices

No. de Pieza. ASDP-21060LCW-160
Descripción  SHARC Processor
Descarga  64 Pages
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Fabricante  AD [Analog Devices]
Página de inicio  http://www.analog.com
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Rev. F
|
Page 38 of 64
|
March 2008
ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC
Link Ports —1 × CLK Speed Operation
Table 23. Link Ports—Receive
5 V
3.3 V
Unit
Parameter
Min
Max
Min
Max
Timing Requirements
tSLDCL
Data Setup Before LCLK Low1
3.5
3
ns
tHLDCL
Data Hold After LCLK Low
3
3
ns
tLCLKIW
LCLK Period (1
u Operation)
tCK
tCK
ns
tLCLKRWL
LCLK Width Low
6
6
ns
tLCLKRWH
LCLK Width High
55ns
Switching Characteristics
tDLAHC
LACK High Delay After CLKIN High2, 3
18 + DT/2
28.5 + DT/2
18 + DT/2
28.5 + DT/2
ns
tDLALC
LACK Low Delay After LCLK High
–3
+13
–3
+13
ns
tENDLK
LACK Enable From CLKIN
5 + DT/2
5 + DT/2
ns
tTDLK
LACK Disable From CLKIN
20 + DT/2
20 + DT/2
ns
1 For ADSP-21062, specification is 3 ns min.
2 LACK goes low with tDLALC relative to rise of LCLK after first nibble, but does not go low if the receiver’s link buffer is not about to fill.
3 For ADSP-21060C, specification is 18 + DT/2 ns min, 29 + DT/2 ns max.
Table 24. Link Ports—Transmit
5 V
3.3 V
Unit
Parameter
Min
Max
Min
Max
Timing Requirements
tSLACH
LACK Setup Before LCLK High1
18
18
ns
tHLACH
LACK Hold After LCLK High
–7
–7
ns
Switching Characteristics
tDLCLK
Data Delay After CLKIN (1
u
Operation)2
15.5
15.5
ns
tDLDCH
Data Delay After LCLK High3
32.5
ns
tHLDCH
Data Hold After LCLK High
–3
–3
ns
tLCLKTWL
LCLK Width Low4
(tCK/2) – 2
(tCK/2) + 2
(tCK/2) – 1
(tCK/2) + 1.25
ns
tLCLKTWH
LCLK Width High5
(tCK/2) – 2
(tCK/2) + 2
(tCK/2) – 1.25
(tCK/2) + 1
ns
tDLACLK
LCLK Low Delay After LACK High6
(tCK/2) + 8.5
(3
u tCK/2) + 17 (tCK/2) + 8
(3
u tCK/2) + 17.5 ns
tENDLK
LACK Enable From CLKIN
5 + DT/2
5 + DT/2
ns
tTDLK
LACK Disable From CLKIN
20 + DT/2
20 + DT/2
ns
1 For ADSP-21060L/ADSP-21060LC, specification is 20 ns min.
2 For ADSP-21060L, specification is 16.5 ns max; for ADSP-21060LC, specification is 16.75 ns max.
3 For ADSP-21062, specification is 2.5 ns max.
4 For ADSP-21062, specification is (tCK/2) – 1 ns min, (tCK/2) + 1.25 ns max; for ADSP-21062L, specification is (tCK/2) – 1 ns min, (tCK/2) + 1.5 ns max; for ADSP-21060LC
specification is (tCK/2) – 1 ns min, (tCK/2) + 2.25 ns max.
5 For ADSP-21062, specification is (tCK/2) – 1.25 ns min, (tCK/2) + 1 ns max; for ADSP-21062L, specification is (tCK/2) – 1.5 ns min, (tCK/2) + 1 ns max; for ADSP-21060C
specification is (tCK/2) – 2.25 ns min, (tCK/2) + 1 ns max.
6 For ADSP-21062, specification is (tCK/2) + 8.75 ns min, (3 × tCK/2) + 17 ns max; for ADSP-21062L, specification is (tCK/2) + 8 ns min, (3 × tCK/2) + 17 ns max; for
ADSP-21060LC specification is (tCK/2) + 8 ns min, (3 × tCK/2) + 18.5 ns max.




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