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CAT34TS02VP2GT4C Datasheet(PDF) 1 Page - ON Semiconductor

No. de pieza CAT34TS02VP2GT4C
Descripción Electrónicos  Digital Output Temperature Sensor with On-board SPD EEPROM
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Fabricante Electrónico  ONSEMI [ON Semiconductor]
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© Semiconductor Components Industries, LLC, 2013
February, 2013 − Rev. 10
1
Publication Order Number:
CAT34TS02/D
CAT34TS02
Digital Output Temperature
Sensor with On-board SPD
EEPROM
Description
The CAT34TS02 combines a JC42.4 compliant Temperature Sensor
(TS) with 2−Kb of Serial Presence Detect (SPD) EEPROM.
The TS measures temperature at least 10 times every second.
Temperature readings can be retrieved by the host via the serial
interface, and are compared to high, low and critical trigger limits
stored into internal registers. Over or under limit conditions can be
signaled on the open−drain EVENT pin.
The integrated 2−Kb SPD EEPROM is internally organized as 16
pages of 16 bytes each, for a total of 256 bytes. It features a 16−byte
page write buffer and supports both the Standard (100 kHz) as well as
Fast (400 kHz) I2C protocol.
Write operations to the lower half memory can be inhibited via
software commands. The CAT34TS02 features Permanent, as well as
Reversible Software Write Protection, as defined for DDR3 DIMMs.
Features
JEDEC JC42.4 Compliant Temperature Sensor
Temperature Range: −20°C to +125°C
DDR3 DIMM Compliant SPD EEPROM
Supply Range: 3.3 V ± 10%
I2C / SMBus Interface
Schmitt Triggers and Noise Suppression Filters on SCL and SDA
Inputs
Low Power CMOS Technology
2 x 3 x 0.75 mm TDFN Package
These Devices are Pb−Free and are RoHS Compliant
Figure 1. Functional Symbol
SDA
SCL
CAT34TS02
VCC
VSS
A2, A1, A0
EVENT
http://onsemi.com
PIN CONFIGURATION
SDA
EVENT
VCC
VSS
A2
A1
A0
1
See detailed ordering and shipping information in the package
dimensions section on page 20 of this data sheet.
ORDERING INFORMATION
SCL
(Top View)
Device Address Input
A0, A1, A2
Serial Data Input/Output
SDA
Serial Clock Input
SCL
Open−drain Event Output
EVENT
Power Supply
VCC
Ground
VSS
Function
Pin Name
PIN FUNCTIONS
For the location of Pin 1, please consult the
corresponding package drawing.
TDFN−8
VP2 SUFFIX
CASE 511AK
Backside Exposed DAP at VSS
DAP
MARKING DIAGRAM
GTX
ALL
YM
GTX
= Specific Device Code
A
= Assembly Location Code
LL
= Assembly Lot Number (Last Two Digits)
Y
= Production Year (Last Digit)
M
= Production Month (1 − 9, O, N, D)
G
= Pb−Free Package
G


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