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LM5041AMTC Datasheet(PDF) 3 Page - Texas Instruments |
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LM5041AMTC Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 22 page  LM5041A www.ti.com SNVS350B – MARCH 2005 – REVISED MARCH 2013 PIN DESCRIPTIONS PIN NAME DESCRIPTION APPLICATION INFORMATION 1 VIN Source Input Voltage Input to start-up regulator. Input range 15V to 100V. Inverting input for the internal error amplifier. The non- 2 FB Feedback Signal inverting input is connected to a 0.75V reference. There is an internal 5k Ω resistor pull-up on this pin. The 3 COMP Output of the Internal Error Amplifier error amplifier provides an active sink. Maximum output current: 10mA. Locally decouple with a 4 REF Precision 5 volt reference output 0.1µF capacitor. Reference stays low until the line UV and the VCC UV are satisfied. Buck switch PWM control output. The maximum duty cycle clamp for this output corresponds to an off time of typically 5 HD Main Buck PWM control output 240ns per cycle. The LM5101 or LM5102 Buck stage gate driver can be used to level shift and drive the Buck switch. Sync Switch control output. Inversion of HD output. The 6 LD Sync Switch control output LM5101 or LM5102 lower drive can be used to drive the synchronous rectifier switch. If an auxiliary winding raises the voltage on this pin above Output from the internal high voltage start-up 7 VCC the regulation setpoint, the internal start-up regulator will regulator. Regulated to 9 volts. shutdown, reducing the IC power dissipation. Output of the push-pull gate driver. Output capability of 8 PUSH Output of the push-pull drivers 1.5A peak . Output of the push-pull gate driver. Output capability of 9 PULL Output of the push-pull drivers 1.5A peak. 10 PGND Power ground Connect directly to analog ground. 11 AGND Analog ground Connect directly to power ground. Current sense input to the PWM comparator (CM control). There is a 50ns leading edge blanking on this pin. Using 12 CS Current sense input separate dedicated comparator, if CS exceeds 0.5V the outputs will go into cycle by cycle current limit. An external capacitor and an internal 10uA current source, 13 SS Soft-start control set the soft-start ramp. An external resistor (RSET) sets the overlap time or dead time for the push-pull outputs. A resistor connected 14 TIME Push-Pull overlap and dead time control between TIME and GND produces overlap. A resistor connected between TIME and REF produces dead time. An external resistor sets the oscillator frequency. This pin 15 RT / SYNC Oscillator timing resistor pin and sync will also accept an external oscillator. An external divider from the power converter source sets the shutdown levels. Threshold of operation equals 2.5V. 16 UVLO Line Under-Voltage Shutdown Hysteresis is set by a switched internal current source (20µA). The exposed die attach pad on the WSON package should be connected to a PCB thermal pad at ground potential. WSON SUB Die substrate For additional information on using the No Pull Back DAP WSON package, please refer to LLP Application Note AN- 1187 (SNOA401). Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM5041A |
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