Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

ADCMP572BCP-RL7 Datasheet(PDF) 9 Page - Analog Devices

No. de pieza ADCMP572BCP-RL7
Descripción Electrónicos  Ultrafast 3.3 V/5 V Single-Supply SiGe Comparators
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

ADCMP572BCP-RL7 Datasheet(HTML) 9 Page - Analog Devices

Back Button ADCMP572BCP-RL7 Datasheet HTML 5Page - Analog Devices ADCMP572BCP-RL7 Datasheet HTML 6Page - Analog Devices ADCMP572BCP-RL7 Datasheet HTML 7Page - Analog Devices ADCMP572BCP-RL7 Datasheet HTML 8Page - Analog Devices ADCMP572BCP-RL7 Datasheet HTML 9Page - Analog Devices ADCMP572BCP-RL7 Datasheet HTML 10Page - Analog Devices ADCMP572BCP-RL7 Datasheet HTML 11Page - Analog Devices ADCMP572BCP-RL7 Datasheet HTML 12Page - Analog Devices ADCMP572BCP-RL7 Datasheet HTML 13Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 16 page
background image
ADCMP572/ADCMP573
Rev. A | Page 9 of 16
APPLICATION INFORMATION
POWER/GROUND LAYOUT AND BYPASSING
The ADCMP572/ADCMP573 comparators are very high speed
SiGe devices. Consequently, it is essential to use proper high
speed design techniques to achieve the specified performance.
Of critical importance is the use of low impedance supply
planes, particularly the output supply plane (VCCO) and the
ground plane (GND). Individual supply planes are recom-
mended as part of a multilayer board. Providing the lowest
inductance return path for switching currents ensures the best
possible performance in the target application.
It is important to adequately bypass the input and output
supplies. A 1 μF electrolytic bypass capacitor should be placed
within several inches of each power supply pin to ground. In
addition, multiple high quality 0.01 μF bypass capacitors should
be placed as close as possible to each of the VCCI and VCCO
supply pins and should be connected to the GND plane with
redundant vias. High frequency bypass capacitors should be
carefully selected for minimum inductance and ESR. Parasitic
layout inductance should be avoided to maximize the
effectiveness of the bypass at high frequencies.
If the input and output supplies are connected separately such
that VCCI ≠ VCCO, care should be taken to bypass each of these
supplies separately to the GND plane. A bypass capacitor
should not be connected between them. It is recommended that
the GND plane separate the VCCI and VCCO planes when the
circuit board layout is designed to minimize coupling between
the two supplies and to take advantage of the additional bypass
capacitance from each respective supply to the ground plane.
This enhances the performance when split input/output
supplies are used. If the input and output supplies are connected
together for single-supply operation such that VCCI = VCCO,
coupling between the two supplies is unavoidable; however,
every effort should be made to keep the supply plane adjacent
to the GND plane to maximize the additional bypass
capacitance this arrangement provides.
CML/RSPECL OUTPUT STAGE
Specified propagation delay dispersion performance can be
achieved only by using proper transmission line terminations.
The outputs of the ADCMP572 are designed to directly drive
400 mV into 50 Ω cable, microstrip, or strip line transmission
lines properly terminated to the VCCO supply plane. The CML
output stage is shown in the simplified schematic diagram of
Figure 15. The outputs are each back terminated with 50 Ω for
best transmission line matching. The RSPECL outputs of the
ADCMP573 are illustrated in Figure 16 and should be
terminated to VCCO − 2 V. As an alternative, Thevenin
equivalent termination networks can be used in either case if
the direct termination voltage is not readily available. If high
speed output signals must be routed more than a centimeter,
microstrip or strip line techniques are essential to ensure proper
transition times and to prevent output ringing and pulse width
dependent propagation delay dispersion. For the most timing
critical applications where transmission line reflections pose the
greatest risk to performance, the ADCMP572 provides the best
match to 50 Ω output transmission paths.
Q
16mA
50
Ω
Q
VCCO
GND
Figure 15. Simplified Schematic Diagram of
the ADCMP572 CML Output Stage
VCCO
GND
Q
Q
Figure 16. Simplified Schematic Diagram of
the ADCMP573 RSPECL Output Stage
USING/DISABLING THE LATCH FEATURE
The latch inputs (LE/LE) are active low for latch mode and are
internally terminated with 50 Ω resistors to Pin 8. This pin
corresponds to and is internally connected to the VCCO supply
for the CML-compatible ADCMP572. With the aid of these
resistors the ADCMP572 latch function can be disabled by
connecting the LE pin to GND with an external pull-down
resistor and leaving the LE pin unconnected. To avoid excessive
power dissipation, the resistor should be 750 Ω when VCCO =
3.3 V, and 1.2 kΩ when VCCO = 5.2 V. In the PECL-compatible
ADCMP573, the VTT pin should be connected externally to the
PECL termination supply at VCCO – 2 V. The latch can then be
disabled by connecting the LE pin to VCCO with an external


Número de pieza similar - ADCMP572BCP-RL7

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Analog Devices
ADCMP572BCP-RL7 AD-ADCMP572BCP-RL7 Datasheet
528Kb / 16P
   Ultrafast 3.3 V/5 V Single-Supply SiGe Comparators
REV. 0
More results

Descripción similar - ADCMP572BCP-RL7

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Analog Devices
ADCMP572 AD-ADCMP572_05 Datasheet
528Kb / 16P
   Ultrafast 3.3 V/5 V Single-Supply SiGe Comparators
REV. 0
ADCMP573 AD-ADCMP573_15 Datasheet
410Kb / 16P
   Ultrafast 3.3 V/5 V Single-Supply SiGe Comparators
REV. A
ADCMP572 AD-ADCMP572_15 Datasheet
410Kb / 16P
   Ultrafast 3.3 V/5 V Single-Supply SiGe Comparators
REV. A
ADCMP573 AD-ADCMP573 Datasheet
412Kb / 16P
   Ultrafast 3.3 V Single-Supply Comparators
Rev. PrB
ADCMP580 AD-ADCMP580_07 Datasheet
429Kb / 16P
   Ultrafast SiGe Voltage Comparators
Rev. A
ADCMP580 AD-ADCMP580_16 Datasheet
409Kb / 16P
   Ultrafast SiGe Voltage Comparators
ADCMP582 AD-ADCMP582_15 Datasheet
430Kb / 16P
   Ultrafast SiGe Voltage Comparators
REV. A
ADCMP580 AD-ADCMP580_05 Datasheet
411Kb / 16P
   Ultrafast SiGe Voltage Comparators
REV. 0
ADCMP580 AD-ADCMP580_15 Datasheet
430Kb / 16P
   Ultrafast SiGe Voltage Comparators
REV. A
ADCMP581 AD-ADCMP581_15 Datasheet
430Kb / 16P
   Ultrafast SiGe Voltage Comparators
REV. A
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Datasheet Descarga

Go To PDF Page


Enlace URL




Política de Privacidad
ALLDATASHEET.ES
¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com