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TPS23770PWP Datasheet(PDF) 3 Page - Texas Instruments

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No. de Pieza. TPS23770PWP
Descripción  INTEGRATED 100-V IEEE 802.3af PD AND DC/DC CONTROLLER
Descarga  41 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TPS23770PWP Datasheet(HTML) 3 Page - Texas Instruments

 
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RECOMMENDED OPERATING CONDITIONS
(1) (2)
DISSIPATION RATINGS TABLE
TPS23750
TPS23770
SLVS590B – JULY 2005 – REVISED FEBRUARY 2008
All voltage values are with respect to VSS unless otherwise noted.
MIN
NOM
MAX
UNIT
VDD
Input voltage range(3)
COM, SEN, SENP
0
67
V
FB, COMP, MODE, BL
0
VBIAS
Input voltage range
AUX to COM
0
16
V
RSP to RSN
0
1
AUX
0
2
Sourcing current
VBIAS
0
2
mA
COMP
0
2
QG
GATE loading
20
nC
AUX load capacitance
0.8
25
µF
VBIAS load capacitance
0.08
1.5
µF
RFREQ
30
300
k
Ω
TJ
Operating junction temperature range
-40
125
°C
TA
Operating ambient temperature range
-40
85
°C
(1)
RSN, COM, and RTN should be tied together. SENP should be tied to VDD except for the buck configuration, where it should be tied to
the output positive rail.
(2)
TMR, FREQ, CLASS, DET, VBIAS, and GATE should not be externally driven.
(3)
Junction temperature may be a constraining factor for high bias power designs.
θ
JP
θ
JC
θ
JA
θ
JA
θ
JA
MAXIMUM POWER RATING
PACKAGE
°C/W(1)
°C/W
°C/W(2)
°C/W(3)
°C/W(4)
(W)(5)
PWP (TSSOP-20)
1.4
26.62
32.6
151.9
73.8
1.2
(1)
Thermal resistance junction to pad.
(2)
See TI document SLMA002 for recommended layout. This is a best case, zero airflow number.
(3)
JEDEC method with low-k board (2 signal layers) and power pad not soldered (worst case).
(4)
JEDEC method with high-k board (4 layers, 2 signal and 2 planes) and power pad not soldered.
(5)
Based on TI recommended layout and 85
°C ambient.
Copyright © 2005–2008, Texas Instruments Incorporated
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Product Folder Link(s): TPS23750 TPS23770


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