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AD7836ASZ Datasheet(PDF) 10 Page - Analog Devices

No. de pieza AD7836ASZ
Descripción Electrónicos  LC2MOS Quad 14-Bit DAC
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AD7836ASZ Datasheet(HTML) 10 Page - Analog Devices

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AD7836
–10–
REV. A
DUTGND Voltage Range
During power-on, the VOUT pins of the AD7836 are connected
to the relevant DUTGND pins via G6 and the 6 k
Ω thin-film
resistor. The DUTGND potential must obey the max ratings at
all times. Thus, the voltage at DUTGND must always be
within the range VSS – 0.3 V, VDD + 0.3 V. However, in order
that the voltages at the VOUT pins of the AD7836 stay within
±2 V of the relevant DUTGND potential during power-on, the
voltage applied to DUTGND should also be kept within the
range AGND – 2 V, AGND + 2 V.
Once the AD7836 has powered on and the on-chip amplifiers
have settled, any voltage that is now applied to the DUTGND
pin is subtracted from the DAC output which has been gained
up by a factor of two. Thus, for specified operation, the maxi-
mum voltage that can be applied to the DUTGND pin increases
to the maximum allowable 2
× VREF(+) voltage, and the mini-
mum voltage that can be applied to DUTGND is the minimum
2
× VREF(–) voltage. After the AD7836 has fully powered on,
the outputs can track any DUTGND voltage within this
minimum/maximum range.
MICROPROCESSOR INTERFACING
Interfacing the AD7836—16-Bit Interface
The AD7836 can be interfaced to a variety of 16-bit micro-
controllers or DSP processors. Figure 19 shows the AD7836
interfaced to a generic 16-bit microcontroller/DSP processor.
The lower address lines from the processor are connected to
A0, A1 and A2 on the AD7836 as shown. The upper address
lines are decoded to provide a chip select signal for the
AD7836. They are also decoded (in conjunction with the lower
address lines if need be) to provide a SEL signal. The fast inter-
face timing of the AD7836 allows direct interface to a wide vari-
ety of microcontrollers and DSPs as shown in Figure 19.
*ADDITIONAL PINS OMITTED FOR CLARITY
ADDRESS
DECODE
AD7836*
D13
D0
CS
A2
A1
A0
WR
D13
D0
A2
A1
A0
R/W
DATA
BUS
UPPER BITS OF
ADDRESS BUS
CONTROLLER/
DSP
PROCESSOR*
Figure 19. AD7836 Parallel Interface
APPLICATIONS
Power Supply Bypassing and Grounding
In any circuit where accuracy is important, careful consider-
ation of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD7836 is mounted should be designed such that
the analog and digital sections are separated and confined to
certain areas of the board. This facilitates the use of ground
planes that can be separated easily. A minimum etch tech-
nique is generally best for ground planes as it gives the best
shielding. Digital and analog ground planes should only be
joined at one place. If the AD7836 is the only device requiring
an AGND to DGND connection, then the ground planes
should be connected at the AGND and DGND pins of the
AD7836. If the AD7836 is in a system where multiple devices
require an AGND to DGND connection, the connection
should still be made at one point only, a star ground point
which should be established as close as possible to the
AD7836.
Digital lines running under the device should be avoided as
these will couple noise onto the die. The analog ground plane
should be allowed to run under the AD7836 to avoid noise
coupling. The power supply lines of the AD7836 should use
as large a trace as possible to provide low impedance paths and
reduce the effects of glitches on the power supply line. Fast
switching signals like clocks should be shielded with digital
ground to avoid radiating noise to other parts of the board and
should never be run near the analog inputs.
Avoid crossover of digital and analog signals. Traces on oppo-
site sides of the board should run at right angles to each other.
This reduces the effects of feedthrough through the board. A
microstrip technique is by far the best but not always possible
with a double sided board. In this technique, the component
side of the board is dedicated to ground plane while signal
traces are placed on the solder side.
The AD7836 should have ample supply bypassing located as
close to the package as possible, ideally right up against the
device. Figure 20 shows the recommended capacitor values of
10
µF in parallel with 0.1 µF on each of the supplies. The 10 µF
capacitors are the tantalum bead type. The 0.1
µF capacitor
should have low Effective Series Resistance (ESR) and Effec-
tive Series Inductance (ESI), such as the common ceramic
types, which provide a low impedance path to ground at high
frequencies to handle transient currents due to internal logic
switching.
AD7836
10 F
0.1 F
10 F
0.1 F
10 F
0.1 F
VCC
VDD
VSS
Figure 20. Recommended Decoupling Scheme
for AD7836


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