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ASDP-21060LCW-160 Datasheet(PDF) 19 Page - Analog Devices

No. de pieza ASDP-21060LCW-160
Descripción Electrónicos  SHARC Processor
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ASDP-21060LCW-160 Datasheet(HTML) 19 Page - Analog Devices

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ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC
Rev. F
|
Page 19 of 64
|
March 2008
INTERNAL POWER DISSIPATION (3.3 V)
These specifications apply to the internal power portion of VDD
only. For a complete discussion of the code used to measure
power dissipation, see the technical note “SHARC Power Dissi-
pation Measurements.”
Specifications are based on the operating scenarios.
To estimate power consumption for a specific application, use
the following equation where % is the amount of time your pro-
gram spends in that state:
%PEAK IDDINPEAK + %HIGH IDDINHIGH + %LOW IDDINLOW +
%IDLE IDDIDLE = Power Consumption
Operation
Peak Activity (IDDINPEAK)
High Activity (IDDINHIGH)
Low Activity (IDDINLOW)
Instruction Type
Multifunction
Multifunction
Single Function
Instruction Fetch
Cache
Internal Memory
Internal Memory
Core memory Access
2 per Cycle (DM and PM)
1 per Cycle (DM)
None
Internal Memory DMA
1 per Cycle
1 per 2 Cycles
1 per 2 Cycles
Parameter
Test Conditions
Max
Units
IDDINPEAK Supply Current (Internal)
1
tCK = 30 ns, VDD = Max
tCK = 25 ns, VDD = Max
540
600
mA
mA
IDDINHIGH Supply Current (Internal)
2
tCK = 30 ns, VDD = Max
tCK = 25 ns, VDD = Max
425
475
mA
mA
IDDINLOW Supply Current (Internal)
2
tCK = 30 ns, VDD = Max
tCK = 25 ns, VDD = Max
250
275
mA
mA
IDDIDLE Supply Current (Idle)
3
VDD = Max
180
mA
1 The test program used to measure IDDINPEAK represents worst case processor operation and is not sustainable under normal application conditions. Actual internal power
measurements made using typical applications are less than specified.
2 IDDINHIGH is a composite average based on a range of high activity code. IDDINLOW is a composite average based on a range of low activity code.
3 Idle denotes ADSP-2106xL state during execution of IDLE instruction.


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