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NM25C640 Datasheet(PDF) 4 Page - Fairchild Semiconductor

No. de Pieza. NM25C640
Descripción  64K-Bit Serial CMOS EEPROM (Serial Peripheral Interface (SPI) Synchronous Bus)
Descarga  10 Pages
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Fabricante  FAIRCHILD [Fairchild Semiconductor]
Página de inicio  http://www.fairchildsemi.com
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NM25C640 Datasheet(HTML) 4 Page - Fairchild Semiconductor

 
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NM25C640 Rev. D.2
Note 5: Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the
device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Note 6: The fOP frequency specification specifies a minimum clock period of 1/fOP. Therefore, for every fOP clock cycle, tCLH + tCLL must be equal to or greater than 1/fOP. For
example, if the 2.1MHz period = 476ns and tCLH = 190ns, tCLL must be 286ns.
Note 7: CS must be brought high for a minimum of t
CSH between consecutive instruction cycles.
Note 8: This parameter is periodically sampled and not 100% tested.
Low Voltage 2.7V
V
CC 4.5V Specifications
Absolute Maximum Ratings (Note 5)
Ambient Storage Temperature
-65
°C to +150°C
All Input or Output Voltage with
Respect to Ground
+6.5V to -0.3V
Lead Temp. (Soldering, 10 sec.)
+300
°C
ESD Rating
2000V
Operating Conditions
Ambient Operating Temperature
NM25C640L/LZ
0
°C to +70°C
NM25C640LZ/LZE
-40
°C to +85°C
NM25C640LV
-40
°C to +125°C
Power Supply (VCC)
2.7V–4.5V
DC and AC Electrical Characteristics 2.7V
≤ V
CC ≤ 4.5V (unless otherwise specified)
25C640L/LE
25C640LV
25C640LZ/LZE
Symbol
Parameter
Part
Conditions
Min.
Max.
Min
Max
Units
I
CC
Operating Current
CS = V
IL
33
mA
ICCSB
Standby Current
L
CS = VCC
10
10
µA
LZ
1
N/A
µA
I
IL
Input Leakage
V
IN = 0 to VCC
-1
1
-1
1
µA
I
OL
Output Leakage
V
OUT = GND to VCC
-1
1
-1
1
µA
VIL
Input Low Voltage
-0.3
0.3 * VCC
-0.3
0.3 * VCC
V
V
IH
Input High Voltage
0.7 * V
CC
V
CC + 0.3
0.7 * V
CC
V
CC + 0.3
V
V
OL
Output Low Voltage
I
OL = 1.6 mA
0.4
0.4
V
V
OH
Output High Voltage
I
OH = –0.8 mA
V
CC - 0.8
V
CC - 0.8
V
fOP
SCK Frequency
2.1
1.0
MHz
t
RI
Input Rise Time
2.0
2.0
µs
t
FI
Input Fall Time
2.0
2.0
µs
t
CLH
Clock High Time
(Note 6)
190
410
ns
tCLL
Clock Low Time
(Note 6)
190
410
ns
t
CSH
Min. CS High Time
(Note 7)
240
500
ns
t
CSS
CS Setup Time
240
500
ns
t
DIS
Data Setup Time
100
100
ns
tHDS
HOLD Setup Time
90
240
ns
t
CSN
CS Hold Time
240
500
ns
t
DIN
Data Hold Time
100
100
ns
t
HDN
HOLD Hold Time
90
240
ns
tPD
Output Delay
CL = 200 pF
240
500
ns
t
DH
Output Hold Time
0
0
ns
t
LZ
HOLD Output Low Z
100
240
ns
t
DF
Output Disable Time
C
L = 200 pF
240
500
ns
tHZ
HOLD to Output Hi Z
100
240
ns
t
WP
Write Cycle Time
1-32 Bytes
15
15
ms
Capacitance T
A = 25°C, f = 2.1/1 MHz (Note 8)
Symbol
Test
Typ Max Units
COUT
Output Capacitance
3
8
pF
C
IN
Input Capacitance
2
6
pF
AC Test Conditions
Output Load
C
L = 200pF
Input Pulse Levels
0.1 * VCC - 0.9 * VCC
Timing Measurement Reference Level
0.3 * V
CC - 0.7 * VCC


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