AD9740-EB datasheet(4/32 Pages) AD

No. de pieza	AD9740-EB

Descripción Electrónicos	10-Bit, 210 MSPS TxDAC D/A Converter

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AD9740

Rev. B | Page 4 of 32

SPECIFICATIONS

DC SPECIFICATIONS

TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

RESOLUTION

10

Bits

DC ACCURACY1

Integral Linearity Error (INL)

−0.7

±0.15

+0.7

LSB

Differential Nonlinearity (DNL)

−0.5

±0.12

+0.5

LSB

ANALOG OUTPUT

Offset Error

−0.02

+0.02

% of FSR

Gain Error (Without Internal Reference)

−2

±0.1

+2

% of FSR

Gain Error (With Internal Reference)

−2

±0.1

+2

% of FSR

Full-Scale Output Current2

2

20

mA

Output Compliance Range

−1

+1.25

V

Output Resistance

100

kΩ

Output Capacitance

5

pF

REFERENCE OUTPUT

Reference Voltage

1.14

1.20

1.26

V

Reference Output Current3

100

nA

REFERENCE INPUT

Input Compliance Range

0.1

1.25

V

Reference Input Resistance (External Reference)

7

kΩ

Small Signal Bandwidth

0.5

MHz

TEMPERATURE COEFFICIENTS

Offset Drift

0

ppm of FSR/°C

Gain Drift (Without Internal Reference)

±50

ppm of FSR/°C

Gain Drift (With Internal Reference)

±100

ppm of FSR/°C

Reference Voltage Drift

±50

ppm/°C

POWER SUPPLY

Supply Voltages

AVDD

2.7

3.3

3.6

V

DVDD

2.7

3.3

3.6

V

CLKVDD

2.7

3.3

3.6

V

Analog Supply Current (IAVDD)

33

36

mA

Digital Supply Current (IDVDD)4

8

9

mA

Clock Supply Current (ICLKVDD)

5

6

mA

Supply Current Sleep Mode (IAVDD)

5

6

mA

Power Dissipation4

135

145

mW

Power Dissipation5

145

mW

Power Supply Rejection Ratio—AVDD6

−1

+1

% of FSR/V

Power Supply Rejection Ratio—DVDD6

−0.04

+0.04

% of FSR/V

OPERATING RANGE

−40

+85

°C

1 Measured at IOUTA, driving a virtual ground.

2 Nominal full-scale current, IOUTFS, is 32 times the IREF current.

3 An external buffer amplifier with input bias current <100 nA should be used to drive any external load.

4 Measured at fCLOCK = 25 MSPS and fOUT = 1 MHz.

5 Measured as unbuffered voltage output with IOUTFS = 20 mA, 50 Ω RLOAD at IOUTA and IOUTB, fCLOCK = 100 MSPS, and fOUT = 40 MHz.

6 ±5% power supply variation.

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