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TPS62243DRVRG4 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS62243DRVRG4 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 29 page  www.ti.com ELECTRICAL CHARACTERISTICS TPS62240, TPS62242, TPS62243 SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply for condition VIN = EN = 3.6V. External components CIN = 4,7µF 0603, COUT = 10µF 0603, L = 2.2µH, refer to parameter measurement information. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VIN Input voltage range 2 6 V 2.3 V ≤ VIN ≤ 6 V 300 IOUT Output current mA 2 V ≤ VIN ≤ 2.3 V 150 IOUT = 0 mA. PFM mode enabled (MODE = GND) 15 device not switching µA IOUT = 0 mA. PFM mode enabled (MODE = GND) IQ Operating quiescent current 18.5 device switching, VOUT = 1.8 V, (1) IOUT = 0 mA, switching with no load (MODE = VIN), 3.8 mA PWM operation , VOUT = 1.8 V, VIN = 3 V ISD Shutdown current EN = GND 0.1 1 µA Falling 1.85 UVLO Undervoltage lockout threshold V Rising 1.95 ENABLE, MODE VIH High level input voltage, EN, MODE 2 V ≤ VIN ≤ 6 V 1 VIN V VIL Low level input voltage, EN, MODE 2 V ≤ VIN ≤ 6 V 0 0.4 V IIN Input bias current, EN, MODE EN, MODE = GND or VIN 0.01 1 µA POWER SWITCH High side MOSFET on-resistance 240 480 RDS(on) VIN = VGS = 3.6 V, TA = 25°C m Ω Low side MOSFET on-resistance 180 380 Forward current limit MOSFET ILIMF VIN = VGS = 3.6 V 0.56 0.7 0.84 A high-side and low side TSD Thermal shutdown Increasing junction temperature 140 °C Thermal shutdown hysteresis Decreasing junction temperature 20 °C OSCILLATOR fSW Oscillator frequency 2 V ≤ VIN ≤ 6 V 2 2.25 2.5 MHz OUTPUT VOUT Adjustable output voltage range 0.6 VIN V Vref Reference Voltage 600 mV MODE = VIN, PWM operation, 2 V ≤ VIN ≤ 6 V, in Feedback voltage –1.5% 0% 1.5% fixed output voltage versions VFB = VOUT, See (2) VFB Feedback voltage PFM mode MODE = GND, device in PFM mode 0% Load regulation -0.5 %/A tStart Up Start-up Time Time from active EN to reach 95% of VOUT nominal 500 µs tRamp VOUT ramp UP time Time to ramp from 5% to 95% of VOUT 250 µs Ilkg Leakage current into SW pin VIN = 3.6 V, VIN = VOUT = VSW, EN = GND, (3) 0.1 1 µA (1) See the parameter measurement information. (2) for VIN = VO + 0.6 (3) In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin. Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TPS62240 TPS62242 TPS62243 |
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