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ADP1712AUJZ-1.05R71 Datasheet(PDF) 11 Page - Analog Devices |
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ADP1712AUJZ-1.05R71 Datasheet(HTML) 11 Page - Analog Devices |
11 / 16 page ADP1712/ADP1713/ADP1714 Rev. A | Page 11 of 16 ADJUSTABLE OUTPUT VOLTAGE (ADP1712 ADJUSTABLE) The ADP1712 adjustable version can have its output voltage set over a 0.8 V to 5.0 V range. The output voltage is set by connecting a resistive voltage divider from OUT to ADJ. The output voltage is calculated using the equation VOUT = 0.8 V (1 + R1/R2) (2) where: R1 is the resistor from OUT to ADJ. R2 is the resistor from ADJ to GND. The maximum bias current into ADJ is 100 nA, so for less than 0.5% error due to the bias current, use values less than 60 kΩ for R2. BYPASS CAPACITOR (ADP1713) The ADP1713 allows for an external bypass capacitor to be connected to the internal reference, which reduces output voltage noise and improves power supply rejection. A low leakage capacitor of 1 nF or greater (10 nF is recommended) must be connected between the BYP and GND pins. TRACK MODE (ADP1714) The ADP1714 includes a tracking mode feature. As shown in Figure 28, if the voltage applied at the TRK pin is less than the nominal output voltage, OUT is equal to the voltage at TRK. Otherwise, OUT regulates to its nominal output value. For example, consider an ADP1714 with a nominal output voltage of 3 V. If the voltage applied to its TRK pin is greater than 3 V, OUT maintains a nominal output voltage of 3 V. If the volt- age applied to TRK is reduced below 3 V, OUT tracks this voltage. OUT can track the TRK pin voltage from the nominal value all the way down to 0 V. A voltage divider is present from TRK to the error amplifier input with a divider ratio equal to the divider from OUT to the error amplifier. This sets the output voltage equal to the tracking voltage. Both divider ratios are set by post- package trim, depending on the desired output voltage. 4 05 VTRK (V) 0 3 2 1 12 34 Figure 28. ADP1714 Output Voltage vs. Tracking Voltage with Nominal Output Voltage Set to 3 V ENABLE FEATURE The ADP1712/ADP1713/ADP1714 use the EN pin to enable and disable the OUT pin under normal operating conditions. As shown in Figure 29, when a rising voltage on EN crosses the active threshold, OUT turns on. When a falling voltage on EN crosses the inactive threshold, OUT turns off. TIME (4ms/DIV) EN OUT VIN =5V VOUT =1.6V COUT =2.2μF ILOAD =10mA 1 Figure 29. ADP1712 Adjustable Typical EN Pin Operation As can be seen, the EN pin has hysteresis built in. This prevents on/off oscillations that can occur due to noise on the EN pin as it passes through the threshold points. The EN pin active/inactive thresholds are derived from the IN voltage. Therefore, these thresholds vary with changing input voltage. Figure 30 shows typical EN active/inactive thresholds when the input voltage varies from 2.5 V to 5.5 V. 1.4 0.5 2.50 5.50 VIN (V) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 EN INACTIVE EN ACTIVE HYSTERESIS Figure 30. Typical EN Pin Thresholds vs. Input Voltage UNDERVOLTAGE LOCKOUT (UVLO) The ADP1712/ADP1713/ADP1714 have an undervoltage lockout circuit, which monitors the voltage on the IN pin. When the voltage on IN drops below 2 V (minimum), the circuit activates, disabling the OUT pin. |
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