Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
ADSP-BF609BBCZ-5 Datasheet(PDF) 5 Page - Analog Devices |
|
ADSP-BF609BBCZ-5 Datasheet(HTML) 5 Page - Analog Devices |
5 / 112 page Rev. 0 | Page 5 of 112 | June 2013 ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609 a very small final memory size. The instruction set also provides fully featured multifunction instructions that allow the pro- grammer to use many of the processor core resources in a single instruction. Coupled with many features more often seen on microcontrollers, this instruction set is very efficient when com- piling C and C++ source code. In addition, the architecture supports both user (algorithm/application code) and supervisor (O/S kernel, device drivers, debuggers, ISRs) modes of opera- tion, allowing multiple levels of access to core processor resources. The assembly language, which takes advantage of the proces- sor’s unique architecture, offers the following advantages: • Seamlessly integrated DSP/MCU features are optimized for both 8-bit and 16-bit operations. • A multi-issue load/store modified-Harvard architecture, which supports two 16-bit MAC or four 8-bit ALU + two load/store + two pointer updates per cycle. • All registers, I/O, and memory are mapped into a unified 4G byte memory space, providing a simplified program- ming model. • Control of all asynchronous and synchronous events to the processor is handled by two subsystems: the Core Event Controller (CEC) and the System Event Controller (SEC). • Microcontroller features, such as arbitrary bit and bit-field manipulation, insertion, and extraction; integer operations on 8-, 16-, and 32-bit data-types; and separate user and supervisor stack pointers. • Code density enhancements, which include intermixing of 16-bit and 32-bit instructions (no mode switching, no code segregation). Frequently used instructions are encoded in 16 bits. PROCESSOR INFRASTRUCTURE The following sections provide information on the primary infrastructure components of the ADSP-BF609 processor. DMA Controllers The processor uses Direct Memory Access (DMA) to transfer data within memory spaces or between a memory space and a peripheral. The processor can specify data transfer operations and return to normal processing while the fully integrated DMA controller carries out the data transfers independent of proces- sor activity. DMA transfers can occur between memory and a peripheral or between one memory and another memory. Each Memory-to- memory DMA stream uses two channels, where one channel is the source channel, and the second is the destination channel. All DMAs can transport data to and from all on-chip and off- chip memories. Programs can use two types of DMA transfers, descriptor-based or register-based. Register-based DMA allows the processor to directly program DMA control registers to ini- tiate a DMA transfer. On completion, the control registers may be automatically updated with their original setup values for continuous transfer. Descriptor-based DMA transfers require a set of parameters stored within memory to initiate a DMA sequence. Descriptor-based DMA transfers allow multiple DMA sequences to be chained together and a DMA channel can be programmed to automatically set up and start another DMA transfer after the current sequence completes. The DMA controller supports the following DMA operations. • A single linear buffer that stops on completion. • A linear buffer with negative, positive or zero stride length. • A circular, auto-refreshing buffer that interrupts when each buffer becomes full. • A similar buffer that interrupts on fractional buffers (for example, 1/2, 1/4). • 1D DMA – uses a set of identical ping-pong buffers defined by a linked ring of two-word descriptor sets, each contain- ing a link pointer and an address. • 1D DMA – uses a linked list of 4 word descriptor sets con- taining a link pointer, an address, a length, and a configuration. • 2D DMA – uses an array of one-word descriptor sets, spec- ifying only the base DMA address. • 2D DMA – uses a linked list of multi-word descriptor sets, specifying everything. CRC Protection The two CRC protection modules allow system software to peri- odically calculate the signature of code and/or data in memory, the content of memory-mapped registers, or communication message objects. Dedicated hardware circuitry compares the signature with pre calculated values and triggers appropriate fault events. For example, every 100 ms the system software might initiate the signature calculation of the entire memory contents and compare these contents with expected, pre calculated values. If a mismatch occurs, a fault condition can be generated (via the processor core or the trigger routing unit). The CRC is a hardware module based on a CRC32 engine that computes the CRC value of the 32-bit data words presented to it. Data is provided by the source channel of the memory-to- memory DMA (in memory scan mode) and is optionally for- warded to the destination channel (memory transfer mode). The main features of the CRC peripheral are: •Memory scan mode •Memory transfer mode •Data verify mode • Data fill mode • User-programmable CRC32 polynomial • Bit/byte mirroring option (endianness) • Fault/error interrupt mechanisms • 1D and 2D fill block to initialize array with constants. • 32-bit CRC signature of a block of a memory or MMR block. |
Número de pieza similar - ADSP-BF609BBCZ-5 |
|
Descripción similar - ADSP-BF609BBCZ-5 |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |