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AD574ATX2 Datasheet(PDF) 6 Page - Analog Devices |
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AD574ATX2 Datasheet(HTML) 6 Page - Analog Devices |
6 / 12 page AD574A REV. B –6– CIRCUIT OPERATION The AD574A is a complete 12-bit A/D converter which requires no external components to provide the complete successive- approximation analog-to-digital conversion function. A block diagram of the AD574A is shown in Figure 1. 1 14 28 15 2 3 4 5 6 7 8 9 10 11 12 13 27 26 25 24 23 22 21 20 19 18 17 16 CONTROL CLOCK SAR 3 S T A T E O U T P U T B U F F E R S MSB N I B B L E N I B B L E N I B B L E LSB 10V REF 12 12 C B A 12 AD574A 3k 19.95k 9.95k 5k 5k N DAC VEE 8k IREF COMP DIGITAL COMMON DC IDAC IDAC = 4 x N x IREF +5V SUPPLY VLOGIC DATA MODE SELECT 12/8 STATUS STS DB11 MSB DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 LSB DIGITAL DATA OUTPUTS CHIP SELECT CS BYTE ADDRESS/ SHORT CYCLE AO READ/CONVERT R/C CHIP ENABLE CE +12/+15V SUPPLY VCC +10V REFERENCE REF OUT ANALOG COMMON AC REFERENCE INPUT REF IN -12/-15V SUPPLY VEE BIPOLAR OFFSET BIP OFF 10V SPAN INPUT 10VIN 20V SPAN INPUT 20VIN Figure 1. Block Diagram of AD574A 12-Bit A-to-D Converter When the control section is commanded to initiate a conversion (as described later), it enables the clock and resets the successive- approximation register (SAR) to all zeros. Once a conversion cycle has begun, it cannot be stopped or restarted and data is not available from the output buffers. The SAR, timed by the clock, will sequence through the conversion cycle and return an end-of-convert flag to the control section. The control section will then disable the clock, bring the output status flag low, and enable control functions to allow data read functions by external command. During the conversion cycle, the internal 12-bit current output DAC is sequenced by the SAR from the most significant bit (MSB) to least significant bit (LSB) to provide an output cur- rent which accurately balances the input signal current through the 5 k Ω (or 10 kΩ) input resistor. The comparator determines whether the addition of each successively-weighted bit current causes the DAC current sum to be greater or less than the input current; if the sum is less, the bit is left on; if more, the bit is turned off. After testing all the bits, the SAR contains a 12-bit binary code which accurately represents the input signal to within ±1/2 LSB. The temperature-compensated buried Zener reference provides the primary voltage reference to the DAC and guarantees excel- lent stability with both time and temperature. The reference is trimmed to 10.00 volts ±0.2%; it can supply up to 1.5 mA to an external load in addition to the requirements of the reference in- put resistor (0.5 mA) and bipolar offset resistor (1 mA) when the AD574A is powered from ±15 V supplies. If the AD574A is used with ±12 V supplies, or if external current must be sup- plied over the full temperature range, an external buffer ampli- fier is recommended. Any external load on the AD574A reference must remain constant during conversion. The thin-film application resistors are trimmed to match the full-scale output current of the DAC. There are two 5 k Ω input scaling resistors to allow either a 10 volt or 20 volt span. The 10 k Ω bipolar offset resistor is grounded for unipolar operation and connected to the 10 volt reference for bipolar operation. DRIVING THE AD574 ANALOG INPUT The internal circuitry of the AD574 dictates that its analog input be driven by a low source impedance. Voltage changes at the current summing node of the internal comparator result in abrupt modulations of the current at the analog input. For accu- rate 12-bit conversions the driving source must be capable of holding a constant output voltage under these dynamically changing load conditions. CURRENT OUTPUT DAC SAR COMPARATOR AD574A IIN iTEST RIN iDIFF V+ V– FEEDBACK TO AMPLIFIER ANALOG COMMON I IN IS MODULATED BY CHANGES IN TEST CURRENT. AMPLIFIER PULSE LOAD RESPONSE LIMITED BY OPEN LOOP OUTPUT IMPEDANCE. CURRENT LIMITING RESISTORS Figure 2. Op Amp – AD574A Interface The output impedance of an op amp has an open-loop value which, in a closed loop, is divided by the loop gain available at the frequency of interest. The amplifier should have acceptable loop gain at 500 kHz for use with the AD574A. To check whether the output properties of a signal source are suitable, monitor the AD574’s input with an oscilloscope while a conver- sion is in progress. Each of the 12 disturbances should subside in 1 µs or less. For applications involving the use of a sample-and-hold ampli- fier, the AD585 is recommended. The AD711 or AD544 op amps are recommended for dc applications. SAMPLE-AND-HOLD AMPLIFIERS Although the conversion time of the AD574A is a maximum of 35 µs, to achieve accurate 12-bit conversions of frequencies greater than a few Hz requires the use of a sample-and-hold amplifier (SHA). If the voltage of the analog input signal driving the AD574A changes by more than 1/2 LSB over the time interval needed to make a conversion, then the input requires a SHA. The AD585 is a high linearity SHA capable of directly driving the analog input of the AD574A. The AD585’s fast acquisition time, low aperture and low aperture jitter are ideally suited for high-speed data acquisition systems. Consider the AD574A converter with a 35 µs conversion time and an input signal of 10 V p-p: the maximum frequency which may be applied to achieve rated accuracy is 1.5 Hz. However, with the addition of an AD585, as shown in Figure 3, the maximum frequency increases to 26 kHz. The AD585’s low output impedance, fast-loop response, and low droop maintain 12-bits of accuracy under the changing load conditions that occur during a conversion, making it suitable for use in high accuracy conversion systems. Many other SHAs cannot achieve 12-bits of accuracy and can thus compromise a system. The AD585 is recommended for AD574A applications requiring a sample and hold. An alternate approach is to use the AD1674, which combines the ADC and SHA on one chip, with a total throughput time of 10 µs. |
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