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TC55VCM416BTGN Datasheet(PDF) 6 Page - Toshiba Semiconductor |
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TC55VCM416BTGN Datasheet(HTML) 6 Page - Toshiba Semiconductor |
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6 / 18 page  TC55VCM416BTGN, TC55VCM416BSGN, TC55VEM416BXGN55 TC55YCM416BTGN, TC55YCM416BSGN, TC55YEM416BXGN70 2005-08-09 6/18 AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = −40° to 85°C) READ CYCLE TC55VCM416BTGN/BSGN55 TC55VEM416BXGN55 VDD = 2.7~3.6 V VDD = 2.3~3.6 V SYMBOL PARAMETER MIN MAX MIN MAX UNIT tRC Read Cycle Time 55 ⎯ 70 ⎯ tACC Address Access Time ⎯ 55 ⎯ 70 tCO1 Chip Enable( 1 CE ) Access Time ⎯ 55 ⎯ 70 tCO2 Chip Enable(CE2) Access Time ⎯ 55 ⎯ 70 tOE Output Enable Access Time ⎯ 30 ⎯ 35 tBA Data Byte Control Access Time ⎯ 30 ⎯ 35 tCOE Chip Enable Low to Output Active 5 ⎯ 5 ⎯ tOEE Output Enable Low to Output Active 0 ⎯ 0 ⎯ tBE Data Byte Control Low to Output Active 0 ⎯ 0 ⎯ tOD Chip Enable High to Output High-Z ⎯ 25 ⎯ 30 tODO Output Enable High to Output High-Z ⎯ 25 ⎯ 30 tBD Data Byte Control High to Output High-Z ⎯ 25 ⎯ 30 tOH Output Data Hold Time 10 ⎯ 10 ⎯ ns WRITE CYCLE TC55VCM416BTGN/BSGN55 TC55VEM416BXGN55 VDD = 2.7~3.6 V VDD = 2.3~3.6 V SYMBOL PARAMETER MIN MAX MIN MAX UNIT tWC Write Cycle Time 55 ⎯ 70 ⎯ tWP Write Pulse Width 40 ⎯ 50 ⎯ tCW Chip Enable to End of Write 45 ⎯ 55 ⎯ tBW Data Byte Control to End of Write 45 ⎯ 55 ⎯ tAS Address Setup Time 0 ⎯ 0 ⎯ tWR Write Recovery Time 0 ⎯ 0 ⎯ tODW R/W Low to Output High-Z ⎯ 25 ⎯ 30 tOEW R/W High to Output Active 0 ⎯ 0 ⎯ tDS Data Setup Time 25 ⎯ 30 ⎯ tDH Data Hold Time 0 ⎯ 0 ⎯ ns Note: tOD, tODO, tBD and tODW are specified in time when an output becomes high impedance, and are not judged depending on an output voltage level. |
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