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74AUP2G86 Datasheet(PDF) 8 Page - NXP Semiconductors |
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74AUP2G86 Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 21 page 74AUP2G86 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 7 — 14 June 2012 8 of 21 NXP Semiconductors 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions 25 C 40 C to +125 C Unit Min Typ[1] Max Min Max (85 C) Max (125 C) CL = 5 pF tpd propagation delay nA or nB to nY; see Figure 8 [2] VCC = 0.8 V - 21.2 - - - - ns VCC = 1.1 V to 1.3 V 2.3 5.9 13.1 2.1 14.3 15.8 ns VCC = 1.4 V to 1.6 V 1.8 4.1 7.7 1.6 8.8 9.7 ns VCC = 1.65 V to 1.95 V 1.5 3.3 5.9 1.4 6.9 7.6 ns VCC = 2.3 V to 2.7 V 1.2 2.6 4.4 1.1 5.3 5.9 ns VCC = 3.0 V to 3.6 V 1.0 2.3 4.0 0.9 4.7 5.2 ns CL = 10 pF tpd propagation delay nA or nB to nY; see Figure 8 [2] VCC = 0.8 V - 24.7 - - - - ns VCC = 1.1 V to 1.3 V 2.6 6.8 14.8 2.4 16.2 17.9 ns VCC = 1.4 V to 1.6 V 2.2 4.8 8.7 1.9 10.0 11.0 ns VCC = 1.65 V to 1.95 V 1.8 3.9 6.7 1.7 8.0 8.8 ns VCC = 2.3 V to 2.7 V 1.5 3.1 5.2 1.4 6.2 6.9 ns VCC = 3.0 V to 3.6 V 1.3 2.9 4.8 1.3 5.6 6.2 ns CL = 15 pF tpd propagation delay nA or nB to nY; see Figure 8 [2] VCC = 0.8 V - 28.2 - - - - ns VCC = 1.1 V to 1.3 V 3.0 7.6 16.5 2.7 18.1 20.0 ns VCC = 1.4 V to 1.6 V 2.4 5.3 9.6 2.2 11.3 12.5 ns VCC = 1.65 V to 1.95 V 2.1 4.4 7.5 1.9 9.0 9.9 ns VCC = 2.3 V to 2.7 V 1.8 3.6 5.9 1.6 7.0 7.7 ns VCC = 3.0 V to 3.6 V 1.6 3.3 5.4 1.5 6.4 7.1 ns CL = 30 pF tpd propagation delay nA or nB to nY; see Figure 8 [2] VCC = 0.8 V - 38.5 - - - - ns VCC = 1.1 V to 1.3 V 3.9 9.9 21.5 3.5 24.1 26.6 ns VCC = 1.4 V to 1.6 V 3.2 6.9 12.5 2.8 14.8 16.3 ns VCC = 1.65 V to 1.95 V 2.8 5.7 9.8 2.5 11.7 12.9 ns VCC = 2.3 V to 2.7 V 2.4 4.7 7.6 2.2 9.1 10.1 ns VCC = 3.0 V to 3.6 V 2.2 4.4 7.1 2.1 8.3 9.2 ns |
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