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AM27C040-150DEB Datasheet(PDF) 10 Page - Advanced Micro Devices |
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AM27C040-150DEB Datasheet(HTML) 10 Page - Advanced Micro Devices |
10 / 13 page 10 Am27C040 FI NAL AC CHARACTERISTICS Caution: Do not remove the device from (or inserted into) a socket when VCC or VPP is applied. Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. This parameter is sampled and not 100% tested. 3. Switching characteristics are over operating range, unless otherwise specified. 4. See Figure 1 and Table 1 for test specifications. SWITCHING WAVEFORMS PACKAGE CAPACITANCE Notes: 1. This parameter is only sampled and not 100% tested. 2. TA = +25°C, f = 1 MHz. Parameter Symbols Description Test Setup Am27C040 Unit JEDEC Std. -90 -120 -150 -200 tAVQV tACC Address to Output Delay CE# = OE# = VIL Max 90 120 150 200 ns tELQV tCE Chip Enable to Output Delay OE# = VIL Max 90 120 150 200 ns tGLQV tOE Output Enable to Output Delay CE# = VIL Max 4050 6575 ns tEHQZ tGHQZ tDF (Note 2) Chip Enable High or Output Enable High, Whichever Occurs First, to Output High Z Max 3030 3040 ns tAXQX tOH Output Hold Time from Addresses, CE# or OE#, Whichever Occurs First Min 0000 ns Parameter Symbol Parameter Description Test Conditions CDV032 PD 032 PL 032 Unit Typ Max Typ Max Typ Max CIN Input Capacitance VIN = 0 V 101210 12 8 10 pF COUT Output Capacitance VOUT = 0 V 121512 15 9 12 pF Addresses CE#/PGM# OE# Output Addresses Valid High Z High Z tCE Valid Output 2.4 0.45 2.0 0.8 2.0 0.8 tACC (Note 1) tOE tDF (Note 2) tOH Note: 1. OE# may be delayed up to tACC - tOE after the falling edge of the addresses without impact on tACC. 2. tDF is specified from OE# or CE#, whichever occurs first. 14971E-1 |
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